Hybrid Principal Subsystem Architect, SoC Power & IP

Ampere Computing LLC; Portland (OR); Hybrid; USD 182,000 - 273,000; Full time

Benefits offered by this job

Premium medical, dental, and vision 보험

401K retirement plan

Unlimited flextime and 10+ paid public

Job summary

Ampere Computing LLC in Portland, Oregon is seeking a Principal Subsystem Hardware Architect to lead scalable SoC subsystem architecture, including reset, power management, interrupt, debug and IP integration. You’ll collaborate across hardware, firmware, software, and platform teams to translate product requirements into concrete specifications that meet performance goals.

We require 6+ years in subsystem architecture and 3+ years in related design; familiarity with LSIO interfaces and IP

Qualifications

• 6+ years of experience in subsystem architecture and design.
• 3+ years of architecture or design experience with subsystems.
• Strong understanding of reset, clocks, power management, DFT and debug.
• Familiar with ARM architecture and IP lifecycle.

Responsibilities

• Define scalable SoC subsystem architecture and interfaces.
• Collaborate across hardware, firmware, software, and platform teams.
• Translate requirements into actionable architecture specifications.
• Lead tradeoff analyses to enable product delivery.
• Align architecture with roadmaps and performance targets.

Skills

Subsystem architecture

RTL development

IP integration

LSIO interfaces

Education

BS in Electrical/Computer Engineering

MS in Electrical/Computer Engineering

PhD in related field

Job description

Ampere Computing LLC in Portland, Oregon is seeking a Principal Subsystem Hardware Architect to lead scalable SoC subsystem architecture, including reset, power management, interrupt, debug and IP integration. You’ll collaborate across hardware, firmware, software, and platform teams to translate product requirements into concrete specifications that meet performance goals.

We require 6+ years in subsystem architecture and 3+ years in related design; familiarity with LSIO interfaces and IP