Senior SoC IP & Interconnect Architect | Flexible Hours

Ampere; Santa Clara (CA); Hybrid; USD 195,000 - 292,000; Full time

Benefits offered by this job

Health insurance

Dental insurance

Vision insurance

401K retirement plan

Unlimited Flextime

Paid holidays

Job summary

Ampere is a semiconductor design company for a new era, leading the future of computing with an innovative approach to CPU design focused on high-performance, energy efficient AI compute.

As Principal SoC IP & Interconnect Architect, you will define and integrate advanced SoC and interconnect IP for next-generation Ampere products. You will drive architecture decisions with system architects, design, verification, and software teams to deliver production-ready IP solutions.

Qualifications

• 6+ years of proven SoC architecture or design experience.
• Familiar with SoC interconnect and coherent fabric architecture.
• Deep understanding of AMBA-based interconnect protocols (AXI and CHI).
• Knowledge of cache-coherent memory systems and DMA traffic.
• Hands-on experience developing architectural performance models.

Responsibilities

• Lead the definition, architecture, and integration of SoC and interconnect IP for next-gen Ampere products.
• Own the end-to-end architecture of one or more I/O and interconnect subsystems, balancing performance, scalability, power, reliability, and platform requirements.
• Drive cross-functional alignment with system architects, design, verification, and software teams to deliver cohesive IP solutions.
• Outline subsystem interfaces, integration strategies, and architectural requirements for seamless connectivity across the SoC platform.
• Define subsystem-level SoC architecture in collaboration with CPU and compute-engine teams, aligning with chassis and integration requirements.
• Influence key technical decisions and resolve complex tradeoffs throughout product development.

Skills

SoC architecture

AMBA AXI/CHI

Cache-coherent memory

Performance modeling

IP lifecycle management

Cross-functional collaboration

RTL/Verification

Education

BS in EE/CE/CS, 8+ years

Tools

RTL/Logic Design

Design Verification

Job description

Ampere is a semiconductor design company for a new era, leading the future of computing with an innovative approach to CPU design focused on high-performance, energy efficient AI compute.

As Principal SoC IP & Interconnect Architect, you will define and integrate advanced SoC and interconnect IP for next-generation Ampere products. You will drive architecture decisions with system architects, design, verification, and software teams to deliver production-ready IP solutions.