Security IP Verification Engineer: Embedded Crypto & Secure Boot

Arm; Austin (TX); On-site; USD 162,000 - 219,000; Full time

Job summary

Arm is seeking a Design Verification Engineer to join the Security IP Team in Austin, TX. You will contribute to test plan development, testbench creation with SystemVerilog/UVM, and verification across cryptography, key management, and secure boot for next-gen SoCs.

You will collaborate with design teams to achieve functional sign-off, optimize power and performance, and mentor junior engineers while advancing verification methodologies used across Arm.

Qualifications

• Solid understanding of digital hardware Verilog HDL and Verification strategies including SystemVerilog UVM, C, Formal, and Hardware/Firmware co-verification.
• Verification experience in Security Hardware, Embedded Processor Systems, Applied Cryptography, Secure Boot, and Key Management.
• Proven experience in complex digital IP architecture and development including multi-clock domain designs, AXI/AHB protocols, multi-power domains, and reset architectures.
• Experience with Perl, Python, Tcl, or other scripting languages.
• Experience with ARM-based designs and/or ARM System Architectures.
• Experience verifying IP or SoC projects or systems including embedded microprocessors. Preference for candidates with experience in firmware/hardware co-verification or formal verification.
• Low-level programming experience including C and Assembler. Experience with firmware debug and tarmac logging.

Responsibilities

• Define and realize the Hardware Security IP and Subsystem.
• Develop test plans, testbenches, verification models, and test strategies.
• Collaborate with design team for functional sign-off and coverage, and for power/performance optimization.
• Mentor team members and balance project initiatives with management planning.

Skills

Verilog HDL

SystemVerilog UVM

C

Assembler

Formal verification

Security IP verification

Embedded processor systems

Cryptography

Secure Boot

Key management

AXI/AHB protocols

Multi-clock domains

ARM-based designs

Scripting: Perl/Python/Tcl

Tools

Verilog

UVM

C

tarmac

Job description

Arm is seeking a Design Verification Engineer to join the Security IP Team in Austin, TX. You will contribute to test plan development, testbench creation with SystemVerilog/UVM, and verification across cryptography, key management, and secure boot for next-gen SoCs.

You will collaborate with design teams to achieve functional sign-off, optimize power and performance, and mentor junior engineers while advancing verification methodologies used across Arm.