Senior SoC Verification Engineer - ML Acceleration

Amazon Web Services (AWS); Austin (TX); On-site; USD 159,000 - 215,000; Full time

Job summary

Annapurna Labs (U.S.) Inc. in Austin, TX is seeking experienced Design Verification Engineers to verify SOC designs and drive testbench development for next-gen cloud server chips. You will integrate 3rd party IPs, create test plans, and maintain regression infrastructure.

Ideal candidates have 8+ years in SystemVerilog/UVM verification, strong C/C++, Python, and memory/subsystem exposure, with a passion for scalable silicon in a dense data-center environment.

Qualifications

• Bachelor's degree or above in Computer Science, Computer Engineering, Electrical Engineering, or related fields.
• 8+ years of design verification experience using SystemVerilog and UVM.
• 8+ years of testbench development including stimulus, checkers, assertions, and coverage.

Responsibilities

• Verify custom chip designs at the SOC level.
• Integrate 3rd party IPs and VIPs into the SOC testbench.
• Create comprehensive testplans, write robust random testcases, and execute coverage plans.
• Maintain autosmoke and regression infrastructure.
• Dive deep into bugs and triages.
• Mentor junior engineers.

Skills

SystemVerilog/UVM

Testbench development

C/C++

Python scripting

AMBA protocols

PCIe/UCIe

Education

Bachelor's degree or above in CS/CE/EE

Job description

Annapurna Labs (U.S.) Inc. in Austin, TX is seeking experienced Design Verification Engineers to verify SOC designs and drive testbench development for next-gen cloud server chips. You will integrate 3rd party IPs, create test plans, and maintain regression infrastructure.

Ideal candidates have 8+ years in SystemVerilog/UVM verification, strong C/C++, Python, and memory/subsystem exposure, with a passion for scalable silicon in a dense data-center environment.