Senior SoC Power Engineer for AI Accelerators

Annapurna Labs; San Diego (CA); On-site; USD 213,000 - 288,000; Full time

Benefits offered by this job

Health insurance

401(k) matching

Paid time off

Job summary

Annapurna Labs (U.S.) Inc. in Cupertino, CA is seeking a Sr. SoC Power Engineer to model and estimate power from RTL to final netlist, driving power reduction for our ML accelerators.

You will collaborate with architects, designers, verification engineers and Physical Design to develop vectors for IR and thermal analysis, create dashboards, and ensure power estimates match simulations across design stages.

Qualifications

• Bachelor’s degree in Computer Science, Computer Engineering, Electrical Engineering, or related fields
• BS + 6yrs or MS + 5yrs or PhD + 3yr in EE/CS
• Expert on power analysis tools like PrimePower, PowerArtist or similar
• Deep, circuit-level understanding of chip power
• Ability to give feedback to RTL designers and Physical Designers on how to reduce power
• Highly proficient with scripting language (Tcl, Perl, Python or similar)
• Good understanding of Physical Design, EM/IR, Power Integrity, and Thermal at the die, package, board, and server level
• Some experience with lab equipment and capable of doing lab power analysis

Responsibilities

• Responsible for full chip power analysis & modelling at various stages of design (RTL to gate level netlist)
• Develop and maintain dashboards for power rollups
• Work with designers, architects, Verification engineers and Physical Design engineers to develop vectors for IR analysis, Thermal analysis and power estimation
• Give feedback to designers and architects on how to reduce power
• Make power measurements in the lab and correlate back to simulations.
• Work with Emulation engineers to model chip‑level power consumption

Skills

Power analysis tools

Scripting (Python, Tcl, Perl)

RTL/EMI knowledge

Lab power measurement

Power integrity

Education

Bachelor’s degree in EE/CS

BS + 6yrs / MS + 5yrs / PhD + 3yr in EE/CS

Tools

PrimePower

PowerArtist

RTL design (SystemVerilog)

Redhawk

Voltus

Zebu Emulator

Job description

Annapurna Labs (U.S.) Inc. in Cupertino, CA is seeking a Sr. SoC Power Engineer to model and estimate power from RTL to final netlist, driving power reduction for our ML accelerators.

You will collaborate with architects, designers, verification engineers and Physical Design to develop vectors for IR and thermal analysis, create dashboards, and ensure power estimates match simulations across design stages.