SoC Power Engineer for AI Accelerators - Drive Power Optimization

Amazon Web Services (AWS); Austin (TX); On-site; USD 136,000 - 184,000; Full time

Benefits offered by this job

Health insurance

RSUs

401(k) matching

Job summary

Annapurna Labs (U.S.) Inc. in Austin, TX seeks a SoC Power Engineer to model and estimate power from RTL to netlist and drive power reduction for Inferentia/Trainium accelerators. You’ll work with architects, designers, verification, software, and PD teams.

A strong background in power analysis, scripting, and PD/EM/IR is desired, with experience using PrimePower or PowerArtist, and a track record of handling scale challenges.

Qualifications

• Bachelor's degree in Electrical Engineering, Computer Science or related field.
• Experience with power analysis tools like PrimePower, PowerArtist or similar.
• Circuit-level understanding of chip power.
• Ability to give feedback to RTL designers and Physical Designers on how to reduce power.
• Proficient with scripting language (Tcl, Perl, Python or similar).
• Good understanding of Physical Design, EM/IR, Power Integrity, and Thermal at various levels.

Responsibilities

• Responsible for full chip power analysis & modelling at RTL to gate level netlist.
• Develop and maintain dashboards for power rollups.
• Collaborate with designers, architects and PD engineers to develop vectors for IR and Thermal analysis and power estimation.
• Provide feedback to designers on ways to reduce power.
• Make power measurements in the lab and correlate with simulations.
• Work with Emulation engineers to model chip-level power consumption.

Skills

Power analysis

Scripting (Tcl/Perl/Python)

Feedback to RTL/PH Designers

Physical Design understanding

EM/IR/Power/ Thermal knowledge

RTL design (SystemVerilog)

Circuit-level power understanding

Education

Bachelor's degree in EE/CS

Master's degree in CS/CE/EE

PhD in EE/CS

Tools

PrimePower

PowerArtist

Redhawk

Voltus

Zebu Emulator

Job description

Annapurna Labs (U.S.) Inc. in Austin, TX seeks a SoC Power Engineer to model and estimate power from RTL to netlist and drive power reduction for Inferentia/Trainium accelerators. You’ll work with architects, designers, verification, software, and PD teams.

A strong background in power analysis, scripting, and PD/EM/IR is desired, with experience using PrimePower or PowerArtist, and a track record of handling scale challenges.