Senior SoC Physical Design Lead

NXP Semiconductors; Austin (TX); Hybrid; USD 180.000 - 240.000; Vollzeit

Zusammenfassung

NXP Semiconductors in Austin, TX, seeks an experienced Principal Physical Design Engineer to own end-to-end SoC PD from RTL to GDSII for advanced nodes. You will lead floorplanning, placement, routing, signoff and post-silicon support, targeting tight PPA and tapeout readiness.

You will mentor teams, drive PD methodologies, collaborate with architecture, RTL, verification, and EDA vendors, and push automation for 5nm and beyond.

Qualifikationen

• Bachelor’s or Master’s in Electrical/Electronics Engineering or related field.
• 10+ years of ASIC/SoC physical design experience.
• Proficiency with Cadence or Synopsys tool flows.
• Strong communication skills and collaboration.

Aufgaben

• Own end-to-end physical design from RTL to GDSII, including floorplanning, synthesis, place & route, CTS, routing, STA, PDN, PDV and signoff.
• Mentor and develop team members; establish execution discipline and reviews.
• Define and deploy next-gen physical design methodologies; drive automation and tool innovation.
• Collaborate with architecture, RTL, verification, and product teams; interface with EDA vendors; support post-silicon brings-up.

Kenntnisse

Strong communication skills

Leadership

Mentoring

Ausbildung

Bachelor’s or Master’s in Electrical / Electronics Engineering

Tools

Cadence toolsets

Synopsys toolflows

Python

TCL

Perl

Jobbeschreibung

NXP Semiconductors in Austin, TX, seeks an experienced Principal Physical Design Engineer to own end-to-end SoC PD from RTL to GDSII for advanced nodes. You will lead floorplanning, placement, routing, signoff and post-silicon support, targeting tight PPA and tapeout readiness.

You will mentor teams, drive PD methodologies, collaborate with architecture, RTL, verification, and EDA vendors, and push automation for 5nm and beyond.