Director of SoC Implementation / Physical Design

NXP Semiconductors; Austin (TX); On-site; USD 180,000 - 260,000; Full time

Job summary

NXP Semiconductors in Austin, TX is seeking a highly experienced leader to head SoC Implementation / Physical Design for advanced semiconductor products. This role owns end-to-end physical design from RTL to silicon and leads global teams to deliver high-quality silicon on aggressive schedules.

The ideal candidate has 17+ years in ASIC/SoC physical design, strong leadership, and deep expertise in EDA tools (Synopsys/Cadence).

Qualifications

• Bachelor’s or Master’s in Electrical / Electronics Engineering or related field.
• 17+ years of experience in ASIC / SoC physical design
• Proven experience leading large-scale SoC programs
• Strong knowledge of industry EDA tools (Synopsys, Cadence flows)
• Demonstrated success in advanced node implementations
• Strong leadership, communication, and stakeholder management skills

Responsibilities

• End-to-End Physical Design Ownership: Lead complete SoC physical design execution from RTL to tapeout.
• Drive timing, power, IR/EM, and physical verification closure to tapeout readiness.
• Deliver optimized PPA across complex designs.
• Align with internal expectations of implementing designs on silicon with optimal quality, cost efficiency.

Skills

SoC leadership

RTL-to-GDSII flow

Program management

Stakeholder management

Education

Electrical/Electronics Engineering

Tools

Synopsys

Cadence

Job description

We are seeking a highly experienced leader to head SoC Implementation / Physical Design for advanced semiconductor products. This role will own end-to-end physical design execution across complex SoCs, driving delivery from RTL to silicon for cutting-edge technology nodes. The ideal candidate combines deep technical expertise with strong organizational leadership, capable of managing large global teams and delivering high-quality silicon on aggressive schedules.

Key Responsibilities

1. End-to-End Physical Design Ownership

   Lead complete SoC physical design execution including floorplanning, synthesis, place & route, CTS, routing, STA, PDN, PDV and signoff.

   Drive timing, power, IR/EM, and physical verification closure to achieve tapeout readiness.

   Deliver optimized PPA (Power, Performance, Area) across complex designs.

   Aligns with internal expectations of implementing designs on silicon with optimal quality, PPA, and cost efficiency.

2. Program & Execution Leadership

   Own planning, tracking, and execution of physical design programs from specification through tapeout.

   Manage risks, dependencies, and schedules across multi-site global teams.

   Drive cross-functional alignment across RTL, DFT, STA, verification, and packaging teams.

   Ensure delivery to aggressive project timelines and quality metrics.

3. Team Leadership & Organization Development

   Build and lead high-performing global physical design teams.

   Drive hiring, mentoring, and career development across technical leads and engineers.

   Establish execution discipline, review mechanisms, and performance tracking.

   Interface with senior leadership for status reporting, escalation, and decision-making.

4. Technical Strategy & Innovation

   Define and deploy next-generation physical design methodologies.

   Drive automation, flow optimization, and tool innovation.

   Lead adoption of advanced node technologies (5nm and beyond).

   Improve scalability, productivity, and design quality through methodology enhancements.

5. Cross-Functional & Ecosystem Engagement

   Collaborate with architecture, RTL, verification, and product teams to ensure design convergence.

   Interface with EDA vendors and IP providers for tool and flow optimization.

   Support post-silicon bring-up, yield improvement, and production ramp activities.

Core Technical Expertise

1. Full RTL-to-GDSII implementation flow
2. Floorplanning, synthesis, PNR, CTS, routing STA and signoff methodologies
3. EM/IR, PDN design, signal integrity
4. Physical verification (DRC/LVS/ERC)
5. Advanced node implementation (≤ 16nm / 5nm)
6. Low power design (UPF/CPF)
7. System-level integration (package, IO, board)

Required Qualifications

• Bachelor’s or Master’s in Electrical / Electronics Engineering or related field
• 17+ years of experience in ASIC / SoC physical design
• Proven experience leading large-scale SoC programs
• Strong knowledge of industry EDA tools (Synopsys, Cadence flows)
• Demonstrated success in advanced node implementationsStrong leadership, communication, and stakeholder management skills

Preferred Qualifications

• Experience in automotive or high-reliability SoCs
• Expertise in PDN / EMIR / SI closure at chip-level
• Experience with global team leadership across geographies
• Exposure to AI-driven design methodologies and automation

More information about NXP in the United States... NXP is an Equal Opportunity/Affirmative Action Employer regardless of age, color, national origin, race, religion, creed, gender, sex, sexual orientation, gender identity and/or expression, marital status, status as a disabled veteran and/or veteran of the Vietnam Era or any other characteristic protected by federal, state or local law. In addition, NXP will provide reasonable accommodations for otherwise qualified disabled individuals.

NXP Semiconductors N.V. (NASDAQ: NXPI) enables a smarter, safer, and more sustainable world through innovation. As the world leader in secure connectivity solutions for embedded applications, NXP is pushing boundaries in the automotive, industrial & IoT, mobile, and communication infrastructure markets. For more information, visit www.nxp.com

Bright Minds. Bright Futures.

We believe that a key component to growing our business is to develop our people. To enable you to grow your career at NXP, we offer online and offline learning opportunities to help you develop some of your core and professional skills.

Commitment At NXP.

We recognize NXP is a powerful change agent as we continue to deliver innovative solutions that advance a more sustainable future. We remain steadfast in our commitment to sustainability and making measurable year-on-year progress. Also, we aim to create an inclusive work environment and we will not tolerate racism, discrimination or harassment of any kind. We have programs in place focused on diversity, inclusion and equality.

Thank you for considering a career at NXP.