Senior SoC Digital Design Architect for AI Compute

Unconventional, Inc.; Mountain View (CA); On-site; USD 180,000 - 260,000; Full time

Benefits offered by this job

Health benefits

401k matching

Unlimited PTO

Complimentary meals in Palo Alto

Job summary

Unconventional, Inc. in Palo Alto, CA is hiring a Member of Technical Staff, Digital Design Engineer with 8+ years of digital ASIC/SoC experience to help drive invention and validate core digital blocks for a novel AI computing platform.

You will lead micro-architecture, integrate third‑party IP, mentor junior engineers, and own RTL implementation, synthesis, timing, linting, and CDC checks while coordinating with physical design teams to enable rapid tape-out.

Qualifications

• Education: B.S. or M.S. in Electrical Engineering, Computer Engineering, or a related field.
• 8+ years of industry experience in digital ASIC/SoC design.
• Strong Verilog RTL coding and digital design fundamentals.
• Understanding of the full ASIC design flow, from specification to tape-out.

Responsibilities

• Lead the detailed micro-architecture definition and top-level integration of digital blocks, including CPU, memory subsystems, and interfaces.
• Own the integration of third‑party IP into the main SoC fabric.
• Drive and perform hands‑on RTL design for complex, timing‑critical SoC blocks and digital interfaces, ensuring PPA targets are met.
• Perform initial synthesis and formal verification to ensure the design is routable and meets frequency targets.
• Run and resolve RTL linting, CDC, and RDC checks using industry standard tools.
• Participate in the block‑level verification plan and help develop a robust verification environment.
• Facilitate hand‑offs to physical implementation teams (synthesis, timing closure).
• Provide technical guidance and mentorship to junior digital design engineers.

Skills

Verilog RTL coding

Digital design fundamentals

CDC analysis

Synthesis & timing

Leadership

Mentoring

Education

B.S./M.S. in Electrical or Computer Engineering

Tools

EDA tools

Simulation tools

Synthesis tools

Linting tools

Job description

Unconventional, Inc. in Palo Alto, CA is hiring a Member of Technical Staff, Digital Design Engineer with 8+ years of digital ASIC/SoC experience to help drive invention and validate core digital blocks for a novel AI computing platform.

You will lead micro-architecture, integrate third‑party IP, mentor junior engineers, and own RTL implementation, synthesis, timing, linting, and CDC checks while coordinating with physical design teams to enable rapid tape-out.