Senior AI Silicon DFT Architect

Unconventional, Inc.

United States

A distancia

USD 180.000 - 290.000

Jornada completa

14 días+

Una candidatura completa en un minuto

Currículum y carta de presentación personalizados, listos para enviar.

Supera los filtros ATS

Descripción de la vacante

Unconventional, Inc. is seeking a Member of Technical Staff, DFT Engineer, to join our R&D team at the forefront of energy-efficient AI hardware.

You will own testability, drive DFT architectures, and ensure robust verification for complex digital and mixed-signal blocks across cutting-edge nodes. The role demands 10+ years in digital DFT, expertise in scan compression, MBIST, ATPG, STA, and strong scripting skills.

Formación

  • Bachelor's or master's degree in Electrical/Computer Engineering or related field.
  • 10+ years of industry experience in digital DFT and test architecture, with tapeouts on modern process nodes (7nm/5nm or newer).
  • Deep expertise in scan compression, MBIST generation, fault modeling (stuck-at, transition, path delay), and ATPG.
  • Strong understanding of physical design challenges in advanced nodes and their impact on test reliability.
  • Expertise in STA and timing closure for complex designs in shift and capture test modes.
  • Mastery of standard EDA CAD tool suites for DFT implementation and vector generation.
  • Strong scripting skills (Tcl, Python, or Perl).
  • Excellent written and verbal communication, with vendor/outsourcing experience.

Responsabilidades

  • Lead DFT architecture and implementation for large-scale SoC designs.
  • Drive hierarchical DFT methodologies to optimize runtime and capacity in test.
  • Interface with foundries to analyze defect densities and improve yield for test chips.
  • Develop DFT for 2.5D/3D multi-stacked die packaging across die-to-die interfaces.
  • Work on analog macro DFT integration and novel test strategies for mixed-signal blocks.
  • Drive test coverage, test time, and yield targets in collaboration with architects.
  • Own ATPG, ATGP vector validation, fault simulation, and STA timing closure for test modes.
  • Develop automation for testability in the design flow and engage partners for AI tool assistance.

Conocimientos

DFT architecture
Scan compression
MBIST
ATPG
Fault modeling
STA
Timing closure
Scripting (Tcl, Python, Perl)
Communication

Educación

B.S. or M.S. in Electrical/Computer Engineering or related field

Herramientas

EDA CAD tool suites
MBIST generation
ATPG tooling

Descripción del empleo

Unconventional, Inc. is seeking a Member of Technical Staff, DFT Engineer, to join our R&D team at the forefront of energy-efficient AI hardware.

You will own testability, drive DFT architectures, and ensure robust verification for complex digital and mixed-signal blocks across cutting-edge nodes. The role demands 10+ years in digital DFT, expertise in scan compression, MBIST, ATPG, STA, and strong scripting skills.

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