Senior SoC Design & Verification Engineer

Belcan; Bellevue (WA); On-site; USD 180,000 - 260,000; Full time

Job summary

Qualifications

• Experience with RTL design, verification, and related methodologies.
• Proven skills in SystemVerilog design, verification, and assertions.
• Hands-on use of industry-standard EDA tools for RTL, linting, and code quality.

Responsibilities

• Review and validate RTL design, verification, and physical implementation tasks.
• Support development of chip design training environments across design, verification, and physical implementation domains.
• Define benchmarks for engineering tasks and assess solutions.
• Collaborate with building teams, model training teams, and domain experts.
• Drive continuous improvement of task realism and engineering standards.
• Explain design decisions and tradeoffs involving power, performance, and area.

Skills

RTL Design

SystemVerilog Design & Verification

SystemVerilog Assertions (SVA)

Education

Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or equivalent

Tools

Synopsys VCS

Design Compiler

Job description