Senior Mixed-Signal IC Designer - High-Speed 100Gbps

NVIDIA; Santa Clara (CA); On-site; USD 196,000 - 311,000; Full time

Benefits offered by this job

Equity

Benefits

Job summary

NVIDIA in Santa Clara, CA is seeking a Senior Mixed Signal Design Engineer to join the team building next generation NVLINK and high-speed interfaces. You will contribute to design, verification and productization of CMOS analog/mixed-signal circuits, lead teams, and mentor designers.

The role demands deep submicron CMOS expertise, strong collaboration, and hands-on lab bring-up across data converters, Tx/Rx, CDRs and PLLs. Equity and benefits accompany the base compensation.

Qualifications

• MS in Electrical Engineering (or equivalent); PhD preferred.
• 4+ years of CMOS analog/mixed-signal design experience.
• Working knowledge of Cadence tools, simulators and timing analysis; experience in data converters, Tx/Rx, CDR, PLL for high-speed IO.
• Strong teamwork, mentoring and leadership experience.
• Deep submicron CMOS process understanding; silicon bring-up and lab instrumentation experience.
• Knowledge of timing budget, signal integrity and power integrity; Verilog and Matlab helpful.

Responsibilities

• Design and implement high-speed interface circuits including transceivers and PLLs.
• Lead and mentor floorplanning and layout design; oversee verification.
• Support lab characterization of silicon and address design challenges in deep submicron CMOS.
• Translate designs from concept to productization and ensure robust implementation.
• Collaborate with cross-functional teams across hardware and test engineering.

Skills

CMOS analog/mixed-signal design

Leadership & mentoring

System timing & power integrity

Verilog

Matlab

Education

MS in Electrical Engineering

PhD preferred

Tools

Cadence tools

Circuit simulators

Timing analysis tools

Verilog

Nanotime

Job description

NVIDIA in Santa Clara, CA is seeking a Senior Mixed Signal Design Engineer to join the team building next generation NVLINK and high-speed interfaces. You will contribute to design, verification and productization of CMOS analog/mixed-signal circuits, lead teams, and mentor designers.

The role demands deep submicron CMOS expertise, strong collaboration, and hands-on lab bring-up across data converters, Tx/Rx, CDRs and PLLs. Equity and benefits accompany the base compensation.