Senior SI/PI Engineer - DDR PHY & PDN Expert

Us Tech Solutions; Santa Clara (CA); On-site; USD 120,000 - 180,000; Full time

Job summary

Us Tech Solutions is seeking an experienced signal integrity and power integrity engineer to own DDR PHY channel and PDN architecture, system-level SI/PI, and post-silicon validation.

The candidate will define channel and PDN architectures, model signal and power delivery at the system level, and validate SI/PI on silicon, collaborating with design, package, board, and firmware teams to meet SI/PI targets and debug issues across the full stack.

Qualifications

• Bachelor's or Master's degree in Computer Engineering or Electrical Engineering.
• Experience defining DDR PHY channel and PDN architecture.
• Strong SI/PI knowledge including modeling and validation.

Responsibilities

• Run system-level channel and PDN simulations and correlate with silicon results.
• Process post-silicon SI/PI validation data and drive next steps.
• Debug SI/PI issues across silicon, package, and board with firmware and design teams.
• Support cross-functional teams with system, channel, PDN, and decoupling implementation details.

Skills

Python

Matlab

SI/PI knowledge

DDR PHY

PDN modeling

System-level validation

Firmware debugging

Education

Bachelors or Masters in Computer Engineering/Electrical Engineering

Tools

HFSS

SIwave

Sigrity

Clarity

Cadence tools

Job description

Us Tech Solutions is seeking an experienced signal integrity and power integrity engineer to own DDR PHY channel and PDN architecture, system-level SI/PI, and post-silicon validation.

The candidate will define channel and PDN architectures, model signal and power delivery at the system level, and validate SI/PI on silicon, collaborating with design, package, board, and firmware teams to meet SI/PI targets and debug issues across the full stack.