Signal and Power Integrity Engineer- #26-21020

Us Tech Solutions; Santa Clara (CA); In loco; USD 120.000 - 180.000; Tempo pieno

Descrizione del lavoro

Us Tech Solutions is seeking an experienced signal integrity and power integrity engineer to own DDR PHY channel and PDN architecture, system-level SI/PI, and post-silicon validation.

The candidate will define channel and PDN architectures, model signal and power delivery at the system level, and validate SI/PI on silicon, collaborating with design, package, board, and firmware teams to meet SI/PI targets and debug issues across the full stack.

Competenze

• Bachelor's or Master's degree in Computer Engineering or Electrical Engineering.
• Experience defining DDR PHY channel and PDN architecture.
• Strong SI/PI knowledge including modeling and validation.

Mansioni

• Run system-level channel and PDN simulations and correlate with silicon results.
• Process post-silicon SI/PI validation data and drive next steps.
• Debug SI/PI issues across silicon, package, and board with firmware and design teams.
• Support cross-functional teams with system, channel, PDN, and decoupling implementation details.

Conoscenze

Python

Matlab

SI/PI knowledge

DDR PHY

PDN modeling

System-level validation

Firmware debugging

Formazione

Bachelors or Masters in Computer Engineering/Electrical Engineering

Strumenti

HFSS

SIwave

Sigrity

Clarity

Cadence tools

Descrizione del lavoro

Duration: 12+ Months

Details

As a member of the CT Server DDR team, we are looking for an experienced signal integrity and power integrity engineer who can be responsible for DDR PHY channel and power delivery network (PDN) architecture, system-level SI/PI, and post-silicon validation.

The engineer needs to be hands-on in defining channel and PDN architectures, modelling signal and power delivery at the system level, and validating SI/PI on silicon. The engineer needs to work with design, package, board, and firmware teams on the specification of SI/PI targets and their implementation, and to help debug issues across the full system stack.

Key Responsibilities

• Run system-level channel and PDN simulations (insertion/return loss, crosstalk, eye diagrams, impedance, IR drop, jitter transfer) and correlate with silicon results
• Able to process post-silicon SI/PI validation data and drive the next steps
• Debug SI/PI issues across silicon, package, and board, working with firmware and design teams
• Support cross-functional teams with system, channel, PDN, and decoupling implementation details

Duration: 12+ Months

Details

As a member of the CT Server DDR team, we are looking for an experienced signal integrity and power integrity engineer who can be responsible for DDR PHY channel and power delivery network (PDN) architecture, system-level SI/PI, and post-silicon validation.

The engineer needs to be hands-on in defining channel and PDN architectures, modelling signal and power delivery at the system level, and validating SI/PI on silicon. The engineer needs to work with design, package, board, and firmware teams on the specification of SI/PI targets and their implementation, and to help debug issues across the full system stack.

Key Responsibilities

• Run system-level channel and PDN simulations (insertion/return loss, crosstalk, eye diagrams, impedance, IR drop, jitter transfer) and correlate with silicon results
• Able to process post-silicon SI/PI validation data and drive the next steps
• Debug SI/PI issues across silicon, package, and board, working with firmware and design teams
• Support cross-functional teams with system, channel, PDN, and decoupling implementation details

Preferred Experience

• Strong coding skills in Python and Matlab preferred
• Signal integrity (SI) and power integrity (PI) knowledge, including S-parameter/Z-parameter analysis, channel modeling, and PDN modeling
• Knowledge of Ansys or Cadence simulation tools (e.g., HFSS, SIwave, Sigrity, Clarity)
• System-level experience with firmware and hardware debug expertise preferred
• System modeling with silicon-to-simulation correlation
• Firmware development for ATE and platforms

Academic Credentials

• Bachelors or Masters degree in Computer Engineering/Electrical Engineering

US Tech Solutions is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, colour, religion, sex, sexual orientation, gender identity, national origin, disability, or status as a protected veteran.

AI Statement

By applying, you acknowledge that AI-assisted tools may be used during hiring.