Senior Signal Integrity Engineer – DDR/PDN, Post-Silicon

Infotree Global Solutions; United States; On-site; USD 120,000 - 180,000; Full time

Job summary

Infotree Global Solutions seeks an experienced DDR Signal Integrity (SI) / Power Integrity (PI) Engineer to develop DDR PHY channel and PDN architectures and perform system-level simulations and post-silicon validation. Must debug SI/PI issues across silicon, package, and board.

Expertise in channel and PDN modeling is required, with proficiency in Ansys or Cadence, and Python/MATLAB for modeling, simulation, and debugging tasks.

Qualifications

• Experience in post-silicon validation focused on signal integrity (SI) and power integrity (PI).
• Strong modeling skills for system-level simulations across silicon, package, and board.

Responsibilities

• Develop DDR PHY channel and PDN architectures.
• Perform system-level simulations and post-silicon validation.
• Debug SI/PI issues across silicon, package, and board.

Skills

DDR SI

PI

Hardware debugging

Firmware debugging

Tools

Ansys

Cadence

MATLAB

Python

Job description

Infotree Global Solutions seeks an experienced DDR Signal Integrity (SI) / Power Integrity (PI) Engineer to develop DDR PHY channel and PDN architectures and perform system-level simulations and post-silicon validation. Must debug SI/PI issues across silicon, package, and board.

Expertise in channel and PDN modeling is required, with proficiency in Ansys or Cadence, and Python/MATLAB for modeling, simulation, and debugging tasks.