Senior Security IP Verification Engineer – Embedded Crypto

Arm Limited; Austin (TX); Hybrid; USD 162,000 - 219,000; Full time

Job summary

Arm is seeking a Design Verification Engineer to contribute to Security IP design, test planning, and verification for pioneering SoCs. You will craft test plans, develop UVM-based testbenches, and collaborate with the design team to ensure functional sign-off and robust coverage.

The role emphasizes hardware security, cryptography, embedded processor subsystems, and firmware co-verification, with opportunities for mentoring and cross-functional impact.

Qualifications

• Bachelor’s or Master’s degree in Computer Science or Electrical/Computer Engineering with 5+ years in design or verification of IP/SoCs.
• Strong understanding of Verilog HDL and SystemVerilog UVM, C, and hardware/firmware co-verification.
• Experience in Security Hardware, Embedded Processor Systems, Cryptography, Secure Boot, and Key Management.

Responsibilities

• Define and realize Hardware Security IP and Subsystem; develop test plans, testbenches, verification models.
• Partner with the design team for functional sign-off and comprehensive coverage; optimize power and performance.
• Develop testbenches in UVM/SystemVerilog/Verilog and C; debug failures; mentor team; coordinate with Project Management.

Skills

Verilog HDL

SystemVerilog UVM

C

Python

Perl

Tcl

ARM architectures

Security IP verification

Multi-clock domains

AXI/AHB protocols

Firmware co-verification

Education

Bachelor's or Master’s in CS or ECE

Job description

Arm is seeking a Design Verification Engineer to contribute to Security IP design, test planning, and verification for pioneering SoCs. You will craft test plans, develop UVM-based testbenches, and collaborate with the design team to ensure functional sign-off and robust coverage.

The role emphasizes hardware security, cryptography, embedded processor subsystems, and firmware co-verification, with opportunities for mentoring and cross-functional impact.