Senior Hardware Security Verification Engineer

Analog Devices, Inc.; Wilmington (MA); In loco; USD 110.000 - 152.000; Tempo pieno

Vantaggi offerti da questo lavoro

Medical, Vision and Dental coverage

401k

Paid vacation

Holidays

Sick time

Descrizione del lavoro

Analog Devices, Inc. seeks a Senior Design Verification Engineer to join our Security IP team, owning verification for complex security IP and subsystems. You will develop advanced verification environments, drive coverage, and collaborate with RTL, firmware, and validation teams.

The role requires 4–7 years of digital design verification, strong SystemVerilog/UVM, and experience with SoC interfaces and security IPs. We offer competitive pay and comprehensive benefits.

Competenze

• Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field.
• Typically 4-7 years of experience in digital design verification.
• Strong proficiency in System Verilog and UVM methodology.
• Experience developing reusable verification environments, scoreboards, checkers, and coverage models.
• Experience with RTL simulation and debug tools (VCS, Xcelium, Simvision, Verdi, Questa).

Mansioni

• Own block-level and subsystem-level verification activities for security-focused IPs and secure enclave solutions.
• Develop verification plans based on architecture specs, threat models, and product requirements.
• Create and maintain SystemVerilog/UVM testbenches, checkers, scoreboards, and coverage models.
• Develop constrained-random and directed test scenarios for functional and security scenarios.
• Drive verification closure through code and functional coverage, and regression analysis.
• Collaborate with RTL designers, firmware engineers, and security experts to ensure design intent.
• Debug RTL and simulation failures, perform root-cause analysis, and drive issue resolution.
• Verify processor-based subsystems, cryptographic accelerators, secure boot mechanisms, and key management.
• Support emulation, firmware integration, and post-silicon validation activities.
• Contribute to reusable VIP, automation infrastructure, and verification methodologies.

Conoscenze

SystemVerilog

UVM

Constrained-random verification

Functional coverage

Debugging and root-cause analysis

Formazione

Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field

Strumenti

VCS

Xcelium

Simvision

Verdi

Questa

Descrizione del lavoro

Analog Devices, Inc. seeks a Senior Design Verification Engineer to join our Security IP team, owning verification for complex security IP and subsystems. You will develop advanced verification environments, drive coverage, and collaborate with RTL, firmware, and validation teams.

The role requires 4–7 years of digital design verification, strong SystemVerilog/UVM, and experience with SoC interfaces and security IPs. We offer competitive pay and comprehensive benefits.