Senior RTL Designer - L1 Accelerator IP (Hybrid, Austin)

Ericsson; Austin (TX); Hybrid; USD 117,000 - 175,000; Full time

Benefits offered by this job

Health benefits

401(k) plan

Paid time off

Stock Purchase Plan

Job summary

Ericsson in Austin, TX is seeking a Senior RTL Design Engineer to own the microarchitecture of next‑gen L1 accelerators from concept to silicon. You’ll translate DSP/FEC workloads into high‑performance SystemVerilog, balancing power, area and throughput in a lean, high‑impact team.

Join a world‑class telecom hardware group delivering end‑to‑end IP with hybrid on‑site collaboration in Austin. Expect autonomy, architectural influence, and tangible product impact across cutting‑edge devices.

Qualifications

• Several years of RTL design in complex ASIC/IP environments.
• Strong SystemVerilog/Verilog skills with efficient designs.
• Experience transforming DSP/FEC algorithms into hardware.

Responsibilities

• Here you’ll work in a small, elite team where your ideas shape products used worldwide—and your contributions have a direct line to impact. You’ll own major blocks end‑to‑end, from concept to hand‑off.
• Turn complex algorithms into cutting‑edge hardware and build from ground up in a fast environment.
• Translate high‑level architecture into fast, reliable RTL (SystemVerilog/Verilog).
• Own major IP blocks—specification, microarchitecture, RTL creation, synthesis, and delivery.
• Serve as the go‑to technical lead for verification, backend/PD, and architecture teams.
• Drive optimizations to balance power, area, and throughput without stifling innovation.
• Lead design decisions shaping the next generation of telecom hardware.

Skills

RTL design

SystemVerilog

Verilog

ASIC flow

DSP/FEC

Architecture strategy

Collaboration

Autonomy

Tools

Synthesis tools

Linting

CDC

Job description

Ericsson in Austin, TX is seeking a Senior RTL Design Engineer to own the microarchitecture of next‑gen L1 accelerators from concept to silicon. You’ll translate DSP/FEC workloads into high‑performance SystemVerilog, balancing power, area and throughput in a lean, high‑impact team.

Join a world‑class telecom hardware group delivering end‑to‑end IP with hybrid on‑site collaboration in Austin. Expect autonomy, architectural influence, and tangible product impact across cutting‑edge devices.