Senior RTL Design Engineer, AI Accelerators (Equity)

Oho Group; San Francisco (CA); On-site; USD 180,000 - 260,000; Full time

Job summary

Oho Group in San Francisco is seeking a Senior RTL Design Engineer to drive accelerator AI technology within stealth startup projects. You will own design work and collaborate with physical design, verification and leadership teams to push the boundaries of chip performance.

The role demands hands-on ASIC/SoC experience, high ownership, and the ability to navigate a fast-moving startup environment. Prior AI/LLM system exposure and high-speed interconnect knowledge are a plus as the company grows

Qualifications

• Strong experience across ASIC and SoC design principles.
• Broad understanding of the wider elements of chip design.
• Hands-on in a fast-moving startup environment.
• Experience with AI/LLM systems and memory/fabric interconnect is a plus, with familiarity with high-speed protocols.

Responsibilities

• Work closely with industry leaders picked from top semiconductor companies.
• Lead projects end-to-end and work cross-functionally across the full chip lifecycle.
• Develop into a role with leadership and equity upside as the company grows.
• Demonstrate initiative to democratise and innovate the next generation of technology.

Skills

ASIC design

SoC design

End-to-end leadership

High-speed protocols

Job description

Oho Group in San Francisco is seeking a Senior RTL Design Engineer to drive accelerator AI technology within stealth startup projects. You will own design work and collaborate with physical design, verification and leadership teams to push the boundaries of chip performance.

The role demands hands-on ASIC/SoC experience, high ownership, and the ability to navigate a fast-moving startup environment. Prior AI/LLM system exposure and high-speed interconnect knowledge are a plus as the company grows