Senior Reliability PDK & TFM Architect

Intel; Hillsboro (OR); On-site; USD 140,000 - 190,000; Full time

Benefits offered by this job

Amazing Benefits

Employee stock purchase program

Job summary

Intel in Hillsboro, Oregon is seeking a seasoned Reliability/PDK Engineer to define reliability rules, develop enablement flows, and drive collaboration with EDA vendors to ensure best-in-class PPA and quality. You will contribute to PDK, TFM, IP, and reliability validation across Intel technology nodes.

The role demands strong communication, cross-functional teamwork, and a track record in reliability design and tool development.

Qualifications

• Minimum qualifications include a Bachelor’s degree in electrical engineering, physics or related field and 6+ years of relevant work experience or 4+ years with a Master’s or PhD plus experience.
• 3+ years in PDK development, reliability tool/flow, design for reliability, or related areas using PDK/EDA tools.

Responsibilities

• Define and generate reliability-related PDK design rules and collateral covering all reliability mechanisms and QA.
• Drive industry EDA tool and flow enablement in synergy with PDK development and collaborate with vendors to deliver competitive TFM.
• Benchmark technology reliability and deliver leading PDK, design rule collateral, and IP ecosystem for internal and external customers.

Skills

Communication skills

Team player

Education

Bachelor's degree in electrical engineering, physics or related field

Master's degree or PhD preferred

Tools

EDA tools

PDK/TFM tooling

Job description

Intel in Hillsboro, Oregon is seeking a seasoned Reliability/PDK Engineer to define reliability rules, develop enablement flows, and drive collaboration with EDA vendors to ensure best-in-class PPA and quality. You will contribute to PDK, TFM, IP, and reliability validation across Intel technology nodes.

The role demands strong communication, cross-functional teamwork, and a track record in reliability design and tool development.