Senior/Principal FPGA Engineer - Onsite Cedar Rapids

Trispoke Managed Services Pvt. Ltd.

Cedar Rapids (IA)

Vor Ort

USD 76.000 - 94.000

Vollzeit

Vor 2 Tagen
Sei unter den ersten Bewerbenden

Eine vollständige Bewerbung in einer Minute

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Zusammenfassung

Trispoke Managed Services Pvt. Ltd. in Cedar Rapids, IA, is seeking a Senior/Principal FPGA Engineer for a 100% onsite contract role. You will lead FPGA/ASIC design, signal processing, verification, and integration of high-performance digital systems for defense electronics programs.

Requirements include 5+ years for Senior or 8+ for Principal, VHDL/Verilog proficiency, and experience with Vivado/Quartus/Altera. U.S. citizenship and ability to obtain Secret clearance are required.

Qualifikationen

  • Bachelor's degree in STEM or related field.
  • Senior: 5+ years FPGA/ASIC experience; Principal: 8+ years.
  • Proficiency with VHDL and/or Verilog.

Aufgaben

  • Design, develop, implement, verify, and integrate FPGA/ASIC solutions.
  • Develop signal-processing algorithms for FPGA-based systems.
  • Use VHDL/Verilog, MATLAB, and Simulink for design and simulation.
  • Perform digital circuit architecture, timing analysis, and timing closure.
  • Integrate FPGA designs with target hardware and lab validation.
  • Support reviews, certification activities, and engineering documentation.
  • Troubleshoot FPGA/ASIC systems and improve development processes.
  • Collaborate with cross-functional teams and provide technical leadership.

Kenntnisse

FPGA development
ASIC front-end design
VHDL/Verilog
Timing analysis
Git/Subversion
Digital circuit architecture

Ausbildung

Bachelor's degree in STEM or related field

Tools

Vivado
Quartus
Altera
Libero
AMD/Xilinx
Microchip

Jobbeschreibung

Trispoke Managed Services Pvt. Ltd. in Cedar Rapids, IA, is seeking a Senior/Principal FPGA Engineer for a 100% onsite contract role. You will lead FPGA/ASIC design, signal processing, verification, and integration of high-performance digital systems for defense electronics programs.

Requirements include 5+ years for Senior or 8+ for Principal, VHDL/Verilog proficiency, and experience with Vivado/Quartus/Altera. U.S. citizenship and ability to obtain Secret clearance are required.

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