Senior Principal Engineer: SerDes & AI Infrastructure

Upscale; Kentucky; On-site; USD 180,000 - 320,000; Full time

Job summary

Upscale, Inc. is building high-performance AI infrastructure and seeks Senior Principal / Distinguished Engineers to lead complex SerDes development. You will shape architectures, drive critical design decisions, and deliver high-speed circuits from concept through silicon validation.

You will mentor teams, influence across disciplines, and help steer next-generation SerDes IP, with a focus on performance, power, area, and reliability for cutting-edge AI workloads.

Qualifications

• MS/PhD in Electrical Engineering with strong analog/mixed-signal experience.
• Extensive 100G+ high-speed circuit design experience.
• Proven track record delivering designs from architecture through silicon validation.
• Strong debugging and cross-disciplinary problem solving.
• Excellent technical communication across teams.

Responsibilities

• Lead design and implementation of high-speed analog/mixed-signal circuits and SerDes IP.
• Define circuit approaches to meet 100G+ performance, power, area goals.
• Resolve design issues through first-principles analysis, modeling, simulation, and silicon validation.
• Lead technical reviews across architecture, analog/mixed-signal, digital, layout, validation.
• Drive design closure including post-layout verification and silicon correlation.
• Identify opportunities for architectural innovation and design automation.
• Contribute to roadmaps, project planning, and risk mitigation for SerDes products.
• Promote rigorous engineering practices and knowledge sharing across the organization.

Skills

Analog IC design

Mixed-signal design

100G+ SerDes design

Silicon validation

Architectural thinking

Technical communication

Education

M.S. or Ph.D. in Electrical Engineering

Job description

Upscale, Inc. is building high-performance AI infrastructure and seeks Senior Principal / Distinguished Engineers to lead complex SerDes development. You will shape architectures, drive critical design decisions, and deliver high-speed circuits from concept through silicon validation.

You will mentor teams, influence across disciplines, and help steer next-generation SerDes IP, with a focus on performance, power, area, and reliability for cutting-edge AI workloads.