Senior Principal Design Technologist: SoC & EDA Lead

Metric Geo; Dallas (TX); On-site; USD 180,000 - 240,000; Full time

Job summary

Metric Search partners with a world-renowned semiconductor organization to hire a Sr. Principal Engineer who will lead the Physical Design Technology Team and influence how next-generation SoCs are designed and built.

You will translate process technology capabilities into design guidelines and methodology improvements, delivering best-in-class PPA, DFM, and yield. This is a strategic role shaping EDA strategy and acting as the glue between process, design, and product functions.

Qualifications

• 15+ years in SoC design or physical design
• Experience with advanced-node fabrication and PDK
• Experience solving timing, power, and signal integrity on modern chips
• Proficient with major EDA toolsets (Cadence, Synopsys, Siemens)

Responsibilities

• Own technology benchmarking and build standardized metrics
• Collaborate with architecture, RTL, and physical design to ground decisions in process reality
• Set design methodology and sign-off strategy for advanced nodes
• Advance EDA flow improvements across synthesis, P&R, timing, power, and verification

Skills

SoC design

Physical design

EDA methodology

Process integration

Timing/power/SPA

Tools

Cadence

Synopsys

Siemens

Job description

Metric Search partners with a world-renowned semiconductor organization to hire a Sr. Principal Engineer who will lead the Physical Design Technology Team and influence how next-generation SoCs are designed and built.

You will translate process technology capabilities into design guidelines and methodology improvements, delivering best-in-class PPA, DFM, and yield. This is a strategic role shaping EDA strategy and acting as the glue between process, design, and product functions.