Senior PLL IC Design Engineer (Relocation & Remote)

Blue Origin

Cupertino (CA)

On-site

USD 230,000 - 323,000

Full time

4 days ago
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Benefits offered by this job

Relocation provided
Onsite work San Diego Bay Area Renton
Temporary remote work exception

Job summary

Blue Origin is seeking an experienced analog/RF IC design engineer to own PLLs and clock distribution for advanced CMOS processes. You will collaborate with RF and SOC architects to define requirements and drive layout, integration, and tape-out verification.

You will develop test plans with validation teams, optimize yield, and mentor junior engineers in analog design practices. A US citizen or eligible status is required for this on-site role in multiple locations.

Qualifications

  • Bachelor's degree in Electrical Engineering or related technical discipline.
  • 7+ years of experience in the design and development of fractional-N PLLs, DLLs, and sub-circuits in FinFET CMOS nodes such as 7nm+.
  • Experience with PLL building blocks (VCOs, pre-scalers, PFDs, charge-pumps).
  • Experience with clock domain synchronization across multiple PLLs/clock domains.
  • Experience with clock distribution circuit design: clock trees, dividers, CML buffers, inductive peaking.
  • Proficiency in mixed-mode modeling, simulation, and verification using MATLAB, Spectre, SystemVerilog, AMS.
  • Extensive PLL silicon characterization and debugging experience.
  • Proficiency in analog/RF building blocks like amplifiers, filters, clocks, bias generators.
  • Must be a U.S. citizen/national, U.S. permanent resident or eligible status.

Responsibilities

  • Own the system and circuit design of PLLs and clock distribution in advanced CMOS technologies with performance trade-offs.
  • Develop high-performance PLL circuits using Spectre and AMS.
  • Collaborate with RF/SOC architects to define PLL requirements.
  • Oversee layout, top-level integration, floorplanning, and tape-out verification.
  • Develop test plans with validation/product engineers for bring-up and yield optimization.
  • Investigate and implement fundamental analog blocks to enhance circuit performance.
  • Mentor junior engineers on best analog design practices.

Skills

PLL design experience
Clock distribution
Spectre/AMS flows
MATLAB
SystemVerilog
Analog circuit design
Leadership/mentoring
CMOS FinFET 7nm+

Education

Bachelor's degree in Electrical Engineering
MS/PhD in Electrical Engineering (preferred)

Tools

Spectre
AMS flows
SystemVerilog

Job description

Blue Origin is seeking an experienced analog/RF IC design engineer to own PLLs and clock distribution for advanced CMOS processes. You will collaborate with RF and SOC architects to define requirements and drive layout, integration, and tape-out verification.

You will develop test plans with validation teams, optimize yield, and mentor junior engineers in analog design practices. A US citizen or eligible status is required for this on-site role in multiple locations.

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