Senior Physical Design & Timing Engineer (STA)

Amazon; Cupertino (CA); On-site; USD 183,000 - 248,000; Full time

Job summary

Amazon seeks a Sr. Physical Design STA Engineer to build scalable timing solutions for cloud server platforms in Cupertino.

You will develop and optimize block- and full-chip static timing analysis flows, write constraints, and drive ECO-based fixes with close collaboration across physical design and RTL teams. Role requires 8+ years in EE/CS with hands-on STA tools, scripting, and a track record of delivering high-performance, cost-effective silicon.

Qualifications

• BS/MS/PhD in EE/CS with extensive timing analysis experience.
• Experience in Static Timing Analysis and timing constraint development.
• Hands-on with EDA tools like PrimeTime or Tempus.

Responsibilities

• Develop & maintain flows for block and full-chip level static timing analysis.
• Write, debug & validate timing constraints for blocks and full-chip.
• Run Static Timing Analysis and provide feedback to team.
• Guide on fixing timing issues and generate ECOs.
• Develop scripts to automate timing analysis and reports.
• Collaborate with physical design and RTL teams.

Skills

Perl

Python

Javascript

Timing analysis fundamentals

Static Timing Analysis

Timing constraint development

EDA tools

PrimeTime

Tempus

RTL-to-GDSII understanding

Education

BS + 8yrs or MS + 6yrs or PhD + 4yr in EE/CS

Tools

PrimeTime

Tempus

STAR-RC

Quantus

Job description

Amazon seeks a Sr. Physical Design STA Engineer to build scalable timing solutions for cloud server platforms in Cupertino.

You will develop and optimize block- and full-chip static timing analysis flows, write constraints, and drive ECO-based fixes with close collaboration across physical design and RTL teams. Role requires 8+ years in EE/CS with hands-on STA tools, scripting, and a track record of delivering high-performance, cost-effective silicon.