Sr. Manager: Cloud-Scale STA & ML Hardware

Socket.dev; Cupertino (CA); On-site; USD 180,000 - 240,000; Full time

Job summary

AWS is seeking a Sr. Physical Design STA Engineer to build the next generation of cloud server platforms. You will lead flows for block and full-chip static timing analysis, write constraints, and run detailed timing analyses to improve performance, power, and cost in AWS data centers.

Join a collaborative team and drive automation, ECOs, and constraint fixes with RTL/Arch partners. 7+ years in ASIC/STA, deep sub-micron nodes, full-custom analog/RF layout and wireless systems are highly valued.

Qualifications

• 7+ years of ASIC implementation, synthesis, STA and physical design in deep sub-micron nodes (16nm or smaller) experience.
• 7+ years of digital design in communication systems experience.
• 7+ years of full-custom analog or RF layout experience.
• 7+ years of wireless communications systems experience.

Responsibilities

• Develop & maintain flows for block and full-chip level static timing analysis.
• Write, debug & validate timing constraints for blocks and full-chip.
• Run Static Timing Analysis and give frequent feedback to team members and leads.
• Provide guidance on how to fix timing issues (generate ECOs, fix constraint issues).
• Develop scripts to automate running timing analysis and generate reports.
• Be a highly-valued member of our start-up like team through excellent collaboration and teamwork with other physical design engineers as well as with the RTL/Arch. teams.

Skills

ASIC implementation

Digital design

Full-custom analog layout

RF layout

Job description

AWS is seeking a Sr. Physical Design STA Engineer to build the next generation of cloud server platforms. You will lead flows for block and full-chip static timing analysis, write constraints, and run detailed timing analyses to improve performance, power, and cost in AWS data centers.

Join a collaborative team and drive automation, ECOs, and constraint fixes with RTL/Arch partners. 7+ years in ASIC/STA, deep sub-micron nodes, full-custom analog/RF layout and wireless systems are highly valued.