Senior Physical Design Engineer – 2.5D/3D IC Interconnects

Broadcom Inc.; San Jose (CA); Hybrid; USD 144,000 - 230,000; Full time

Benefits offered by this job

Medical insurance

Dental & Vision

401(k) with company match

ESPP

EAP

Holidays

Sick leave

Vacation

Job summary

Broadcom Inc. in San Jose, CA, seeks a design engineer with physical layout skills to advance next‑generation ASIC products, focusing on parallel interfaces and 2.5D/3D interconnects.

You will work across R&D, IP development, customers, and manufacturing partners on new interconnect technologies. The role blends layout, electrical analysis, and automation, with opportunities to shape technology roadmaps and deliver high‑impact silicon solutions.

Qualifications

• Bachelor's degree in Electrical Engineering or Computer Science with 12+ years of related work experience or a Master’s degree with 10+ years of related work experience.
• Experience across IC, Package and PCB layout databases and tools.
• Strong scripting in TCL and Python to automate routine tasks.

Responsibilities

• Design implementation and physical layout of power grids, 2.5D and 3D die-die interconnects.
• Perform DRC, LVS, and electrical checks.
• Automate common processes and design steps.
• Develop high-speed signal interconnects with SI/PI engineers.
• Conduct electrical analysis and optimize ubump and RDL patterns.
• Evaluate and develop new 2.5D/3D interconnect technologies and roadmaps.

Skills

Independent, self-starter

Multitask across organization

Guidance with incomplete information

IC/Package/PCB layout databases

Education

Bachelor's degree in Electrical Engineering or Computer Science

Master's degree in Electrical Engineering or Computer Science

12+ years related work experience

Tools

TCL scripting

Python scripting

IC/PCB/Package layout tools

Job description

Broadcom Inc. in San Jose, CA, seeks a design engineer with physical layout skills to advance next‑generation ASIC products, focusing on parallel interfaces and 2.5D/3D interconnects.

You will work across R&D, IP development, customers, and manufacturing partners on new interconnect technologies. The role blends layout, electrical analysis, and automation, with opportunities to shape technology roadmaps and deliver high‑impact silicon solutions.