Senior PD Timing Engineer for AI Accelerator Silicon

DensityAI; Mountain View (CA); On-site; USD 220,000 - 350,000; Full time

Benefits offered by this job

Equity grants

Medical, dental, vision

401(k)

Standard PTO

Job summary

DensityAI in Mountain View, California is looking for a skilled professional to own full chip and block timing methodologies for their AI accelerator silicon. The role requires extensive experience in high performance designs and the ability to work closely with chip-design and software teams.

Requirements include 10+ years in physical design, familiarity with standard PD tools, and collaboration experience. Compensation ranges from $220,000 to $350,000 USD, depending on experience.

Qualifications

• 10+ years of experience on very high performance designs at advanced technology nodes (7nm or better).
• Hands-on experience with industry-standard physical design tools.
• Ability to work closely with various teams to design complex chips.

Responsibilities

• Own Full chip and Block timing methodologies and execution to-signoff of the AI accelerator silicon.
• Develop AI-assisted tool flows to accelerate physical design timing.

Skills

Full physical design flow expertise

High performance designs experience

Industry-standard PD tools knowledge

Collaboration with architects and EDA vendors

Tools

Cadence Innovus

Synopsys Fusion Compiler

PrimeTime

Tempus

Job description

DensityAI in Mountain View, California is looking for a skilled professional to own full chip and block timing methodologies for their AI accelerator silicon. The role requires extensive experience in high performance designs and the ability to work closely with chip-design and software teams.

Requirements include 10+ years in physical design, familiarity with standard PD tools, and collaboration experience. Compensation ranges from $220,000 to $350,000 USD, depending on experience.