Senior PCIe Post-Silicon Characterization Engineer

Hikinex; Palo Alto (CA); On-site; USD 140,000 - 210,000; Full time

Job summary

Hikinex in Palo Alto, CA, seeks an experienced engineer to perform post-silicon electrical characterization and validation of high-speed interfaces such as PCIe, Ethernet, UFS, and LPDDR5. You will work hands-on with lab equipment and debug at the probe level.

The role requires 5+ years in post-silicon characterization or HSIO/memory validation, strong scripting in Python for lab automation, and the ability to read schematics and PCB layouts. Semiconductor industry experience is preferred.

Qualifications

• 5+ years in post-silicon characterization, HSIO validation, or memory electrical validation.
• Hands-on experience with eye, jitter, BER, and S-parameter measurements.
• Proficient with high-speed oscilloscopes, BERT, VNA, and TDR equipment.
• Ability to read schematics and PCB layouts and debug issues at the probe level.

Responsibilities

• Perform post-silicon electrical characterization and validation of high-speed interfaces.
• Lead lab automation tasks using Python scripts to streamline measurements.
• Collaborate with design and verification teams to isolate and fix issues at the probe level.

Skills

Post-silicon characterization

HSIO validation

Eye/Jitter/B́ER measurements

S-parameter measurements

High-speed test equipment

Python scripting

Schematics & PCB reading

Tools

Oscilloscopes

BERT

VNA

TDR

Job description

Hikinex in Palo Alto, CA, seeks an experienced engineer to perform post-silicon electrical characterization and validation of high-speed interfaces such as PCIe, Ethernet, UFS, and LPDDR5. You will work hands-on with lab equipment and debug at the probe level.

The role requires 5+ years in post-silicon characterization or HSIO/memory validation, strong scripting in Python for lab automation, and the ability to read schematics and PCB layouts. Semiconductor industry experience is preferred.