Senior mmWave RFIC Architect - Front-End Innovation

Blue Origin; San Diego (CA); Presencial; USD 198 000 - 277 000; Tempo integral

Vantagens oferecidas por esta oferta de emprego

Relocation provided

Medical, dental, vision

Stock options

401(k) with match

Paid time off

Education Support Program

Resumo da oferta

Blue Origin seeks a Principal RF/mmWave IC Design Engineer to drive development of cutting-edge RF/mmWave front-end ICs for space-based communications. You will design power amplifiers, low-noise amplifiers, phase shifters, VGAs, mixers, and synthesizers in advanced silicon technologies, while partnering with system engineers on feasible front-end architectures.

You will lead chip-level integration and engage with third-party partners, mentoring junior engineers and ensuring robust PHY-level

Qualificações

• 10+ years in millimeter-wave RFIC design across SiGe/CMOS/SOI.
• Experience with mmWave transistor topologies for highly integrated TX/RX.
• Hands-on mmWave IC characterization, debugging, and modeling of TX/RX chains.

Responsabilidades

• Design state-of-the-art RF/mmWave front-end chipsets (PA, LNA, phase shifters, VGAs, mixers, multipliers, synthesizers).
• Collaborate with RF system engineers to translate system requirements into chip specs.
• Simulate on-chip EM structures and coordinate with package team for IC/package interfaces.
• Oversee integration and optimization through development and production stages.

Conhecimentos

mmWave RFIC design

CMOS/SiGe/SOI

Power amplifiers

Low-noise amplifiers

Phase shifters

Synthesizers

EM simulations

Transmitter/receiver topologies

Top-level integration

Mentoring

Descrição da oferta de emprego

Blue Origin seeks a Principal RF/mmWave IC Design Engineer to drive development of cutting-edge RF/mmWave front-end ICs for space-based communications. You will design power amplifiers, low-noise amplifiers, phase shifters, VGAs, mixers, and synthesizers in advanced silicon technologies, while partnering with system engineers on feasible front-end architectures.

You will lead chip-level integration and engage with third-party partners, mentoring junior engineers and ensuring robust PHY-level