Senior Mixed-Signal Verification Engineer for High-Speed SoC

Retym, Inc; Austin (TX); On-site; USD 130,000 - 160,000; Full time

Job summary

Retym, Inc is seeking a Sr Mixed Signal Verification Engineer in Austin, Texas, to develop cutting-edge technology in high-speed communication. This role requires extensive experience in verification strategies for mixed-signal designs, utilizing UVM methodologies and a collaborative team environment.

The ideal candidate should have over 10 years of experience, alongside proficiency in Verilog/SystemVerilog coding and experience in using Synopsys and Cadence tools. Strong communication skills and a basic understanding of Analog design are essential for this position.

Qualifications

• 10+ years of experience in verification engineering.
• Experience in Behavioural Modelling for digital verification.
• Basic knowledge in Analog design.

Responsibilities

• Develop verification strategies for mixed-signal designs.
• Create models for analog blocks according to guidelines.
• Write and debug testbenches using UVM methodology.
• Run simulations of mixed-signal designs and troubleshoot.

Skills

Behavioural Modelling of Analog Design

Mixed Signals Dynamic Verification

Verilog/SystemVerilog Coding

Experience with UVM

Experience with Virtuoso Schematics

Collaboration in Team Environment

Tools

Synopsys Tools

Cadence Tools

Job description

Retym, Inc is seeking a Sr Mixed Signal Verification Engineer in Austin, Texas, to develop cutting-edge technology in high-speed communication. This role requires extensive experience in verification strategies for mixed-signal designs, utilizing UVM methodologies and a collaborative team environment.

The ideal candidate should have over 10 years of experience, alongside proficiency in Verilog/SystemVerilog coding and experience in using Synopsys and Cadence tools. Strong communication skills and a basic understanding of Analog design are essential for this position.