Senior Mixed-Signal Verification Engineer Analog IP

onsemi; Allen (TX); Sur place; USD 100 000 - 130 000; Plein temps

Résumé du poste

onsemi is looking for a Mixed-Signal Verification Engineer III in Texas. This role involves verifying analog and mixed-signal IP for digital SoC environments on the Treo platform, employing SystemVerilog and behavioral modeling techniques.

The ideal candidate has at least 6 years of verification experience, strong skills in SystemVerilog and UVM, and familiarity with power management architectures. The position offers an exciting opportunity for career growth within a collaborative team.

Qualifications

• 6+ years of experience in mixed-signal or digital IC verification.
• Strong proficiency in SystemVerilog and UVM.
• Hands-on experience building behavioral models.

Responsabilités

• Own mixed-signal verification for assigned analog IP blocks.
• Develop scalable testbenches and behavioral models.
• Coordinate with teams to ensure verification completeness.

Connaissances

SystemVerilog

UVM-based verification

Behavioral modeling

Mixed-signal verification

Formation

Bachelor’s or Master’s degree in Electrical Engineering

Outils

Verilog-A/AMS

AMS simulation tools

Description du poste

onsemi is looking for a Mixed-Signal Verification Engineer III in Texas. This role involves verifying analog and mixed-signal IP for digital SoC environments on the Treo platform, employing SystemVerilog and behavioral modeling techniques.

The ideal candidate has at least 6 years of verification experience, strong skills in SystemVerilog and UVM, and familiarity with power management architectures. The position offers an exciting opportunity for career growth within a collaborative team.