A leading recruitment agency in the U.S. is seeking a Mixed Signal Verification Engineer with over 5 years of experience in behavioral modeling of analog design and proficiency in Verilog/SystemVerilog coding. The role requires familiarity with verification methodologies and the ability to develop scalable test cases in a collaborative team environment. Candidates with experience in UVM and various industry-standard tools are preferred. The company offers visa sponsorship for H1-B applicants.
Qualifications
5+ years of total experience in Analog design verification.
Experience in Verilog/SystemVerilog coding.
Familiarity with verification methodologies and tools including simulators.
Responsibilities
Verify Analog/mixed-signal designs in a collaborative team environment.
Develop scalable and portable test cases.
Write test plans and present results to multi-functional teams.
Skills
Behavioral Modelling (BM) of Analog design
Verilog/SystemVerilog coding
Virtuoso Schematics tools
Verification Methodologies and Tools
UVM
Strong communication skills
Tools
Synopsys
Cadence tools
Job description
A leading recruitment agency in the U.S. is seeking a Mixed Signal Verification Engineer with over 5 years of experience in behavioral modeling of analog design and proficiency in Verilog/SystemVerilog coding. The role requires familiarity with verification methodologies and the ability to develop scalable test cases in a collaborative team environment. Candidates with experience in UVM and various industry-standard tools are preferred. The company offers visa sponsorship for H1-B applicants.