Senior Mixed-Signal RF Modeling & Verification Engineer

Apple, Inc.

Jackson (TN)

On-site

USD 185,000 - 325,000

Full time

14 days+

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Benefits offered by this job

Stock programs
Employee stock purchase plan
Medical coverage
Retirement benefits
Product discounts
Education reimbursement
Bonuses or commissions
Relocation assistance

Job summary

Apple, Inc. is seeking a senior Design Verification Engineer to verify RNM/SystemVerilog models for analog/RF blocks inside a large SoC. You will implement self-checking models, develop assertions, and work with analog designers to enable AMS simulations and robust verification.

The role requires strong RNM/SystemVerilog skills, Cadence experience, and a deep understanding of mixed-signal verification. Relocation assistance and comprehensive benefits are offered.

Qualifications

  • MSc with 7+ years of relevant industry experience.
  • BS with 10+ years of relevant industry experience.
  • Experience in RNM coding in SystemVerilog and analog/RF model development.
  • A strong grasp of analog/digital interfaces and verification strategies.

Responsibilities

  • Develop RNM RF/Analog models in SystemVerilog.
  • Create models with self-checking techniques and assertions.
  • Assess model accuracy against verification goals.
  • Develop assertions to enforce analog/digital specs.
  • Collaborate with analog designers to set up AMS simulations.
  • Debug complex chip digital-on-top testbenches and identify root causes.

Skills

RNM SystemVerilog
Self-checking techniques
Analog/RF modeling
Debug/testbenches
Read analog schematics

Education

MSc in Electrical Engineering
B.S. in Electrical Engineering

Tools

Cadence mixed signal verification environment

Job description

Apple, Inc. is seeking a senior Design Verification Engineer to verify RNM/SystemVerilog models for analog/RF blocks inside a large SoC. You will implement self-checking models, develop assertions, and work with analog designers to enable AMS simulations and robust verification.

The role requires strong RNM/SystemVerilog skills, Cadence experience, and a deep understanding of mixed-signal verification. Relocation assistance and comprehensive benefits are offered.

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