Senior Microarchitect: Coherent Interconnect RTL

Samsung Semiconductor; San Jose (CA); On-site; USD 151,000 - 251,800; Full time

Benefits offered by this job

Medical, dental, and vision insurance

401(k) plan

Free onsite lunch

Tuition assistance

Job summary

Samsung Semiconductor in San Jose, California is seeking a Micro-Architect/Logic Designer to lead the micro-architecture development of custom coherent interconnect IP. Candidates should have strong RTL design experience and the ability to mentor junior engineers.

The role requires interaction with system architects, verification, and implementation teams to ensure designs meet performance and power goals.

Samsung offers a comprehensive compensation package including health benefits, bonuses, and relocation options.

Qualifications

• 10+ years' experience with Bachelor's, or 8+ with Master's, or 6+ with PhD.
• Strong background in RTL design for high-performance digital designs.
• Knowledge of memory subsystem and coherent cache design.

Responsibilities

• Lead micro-architecture development for custom coherent interconnect IP.
• Work alongside teams to verify and achieve design specifications.
• Mentor junior engineers in the team.

Skills

RTL design

Verilog expertise

Team leading and mentoring

Strong communication skills

Education

Bachelor’s degree in Computer Science/Computer Engineering/relevant technical field

Tools

Verilog

VHDL

Scripting languages (Perl, Python)

Job description

Samsung Semiconductor in San Jose, California is seeking a Micro-Architect/Logic Designer to lead the micro-architecture development of custom coherent interconnect IP. Candidates should have strong RTL design experience and the ability to mentor junior engineers.

The role requires interaction with system architects, verification, and implementation teams to ensure designs meet performance and power goals.

Samsung offers a comprehensive compensation package including health benefits, bonuses, and relocation options.