Lead Coherent Interconnect Micro-Architect

Samsung Semiconductor; San Jose (CA); On-site; USD 222,000 - 365,000; Full time

Benefits offered by this job

Medical

Dental

Vision

Life insurance

401(k)

Free onsite lunch

Employee purchase program

Tuition assistance

Paid time off

Wellness incentives

Long-term incentive plan

Relocation

Job summary

Samsung Semiconductor is seeking a Principal Micro-architect to lead microarchitecture development of custom coherent interconnect IP and LLC blocks for next‑generation designs. You will drive RTL design, optimize for performance and power, and collaborate with system architects, verification, and physical design teams.

The role requires strong computer architecture background, leadership experience, and deep Verilog/SystemVerilog expertise across ASIC flows.

Qualifications

• 15+ years with a CS/CE degree or 13+ with MS or 11+ with PhD; leadership in RTL design.
• Strong RTL design experience for coherent interconnect and LLC blocks.
• Experience from architecture definition through RTL implementation.
• Familiar with mesh, ring, crossbar, and AMBA protocols (CHI/ACE/AXI).
• Deep expertise in Verilog/SystemVerilog and ASIC flows (STA, DFT, ECO).
• Memory subsystem and cache coherency knowledge; strong collaboration skills.

Responsibilities

• Own development and delivery of coherent interconnect IP and LLC blocks.
• Collaborate with system architects on next‑gen architectures.
• Define microarchitecture from exploration to detailed specs.
• Partner with verification for functional correctness and validation.
• Develop RTL that meets performance, power and area goals.
• Work with performance/power teams to optimize RTL/architecture.
• Coordinate with physical design and CAD to resolve timing issues.
• Provide technical leadership and mentorship to junior engineers.

Skills

RTL design

Architecture definition

Verilog/SystemVerilog

AMBA protocol knowledge

Memory subsystem architecture

Leadership/mentoring

Python/Perl scripting

Education

Bachelor’s degree in Computer Science/Computer Engineering

PhD in a relevant field

Tools

Verilog/SystemVerilog

Scripting (Python/Perl)

Job description

Samsung Semiconductor is seeking a Principal Micro-architect to lead microarchitecture development of custom coherent interconnect IP and LLC blocks for next‑generation designs. You will drive RTL design, optimize for performance and power, and collaborate with system architects, verification, and physical design teams.

The role requires strong computer architecture background, leadership experience, and deep Verilog/SystemVerilog expertise across ASIC flows.