Lead Micro-Architect, Coherent Interconnect IP

Samsung Semiconductor; Austin (TX); On-site; USD 222,000 - 365,000; Full time

Benefits offered by this job

Medical

Dental

Vision

Life Insurance

401(k)

Lunch on site

Employee purchase program

Tuition assistance

Paid time off

Wellness incentives

Job summary

Samsung Austin Research and Development Center (SARC) and ACL is seeking a Principal Micro-architect to lead the microarchitecture development of custom coherent interconnect IP and LLC blocks for next‑generation designs. You will drive RTL design, performance and power optimization, and timing closure.

You will collaborate with system architects, verification, physical design, and CAD teams, mentor engineers, and help shape the architecture for scalable, high‑volume products in a global company.

Qualifications

• Bachelor’s degree in CS/CE or a related field.
• Strong RTL design and architecture experience.
• Experience with on‑chip networks and AMBA protocols.
• Demonstrated leadership and mentoring of engineers.
• Excellent collaboration across distributed teams.

Responsibilities

• Own the development and delivery of custom coherent interconnect IP and/or LLC blocks, ensuring high-quality execution and timely project completion.
• Collaborate with system architects to define and develop next-generation coherent interconnect and LLC architectures.
• Drive microarchitecture definition from exploration to detailed specification development.
• Partner with verification teams to ensure functional correctness and robust validation.
• Develop RTL implementations that meet performance, power, and area goals.
• Work with performance and power teams to optimize architecture and RTL implementations.
• Collaborate with physical design and CAD teams to resolve timing challenges.
• Provide technical leadership and mentorship to junior engineers.

Skills

RTL design

Coherent interconnect

Memory subsystem

Verilog/SystemVerilog

Leadership

Scripting (Python)

Education

Bachelor's degree in CS/CE

Master's degree

PhD

Tools

EDA tools

Arm AMBA5 CHI

AMBA4 ACE

AXI

Job description

Samsung Austin Research and Development Center (SARC) and ACL is seeking a Principal Micro-architect to lead the microarchitecture development of custom coherent interconnect IP and LLC blocks for next‑generation designs. You will drive RTL design, performance and power optimization, and timing closure.

You will collaborate with system architects, verification, physical design, and CAD teams, mentor engineers, and help shape the architecture for scalable, high‑volume products in a global company.