Senior Micro-Architect, Coherent Interconnect IP

Samsung Electronics

San Jose (CA)

Vor Ort

USD 222.000 - 365.000

Vollzeit

14 Tage+

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Zusammenfassung

Samsung Electronics America, Inc. is seeking a Principal Micro-architect to lead the microarchitecture development of custom coherent interconnect IP and LLC blocks for next-generation designs.

You will drive RTL design, collaborate with system architects, and mentor engineers within a global, highly distributed team to deliver high-performance, power-efficient IP for a broad range of products.

Qualifikationen

  • 15+ years of experience with a Bachelor’s degree in Computer Science/Computer Engineering/relevant technical field, or 13+ years of experience with a Master’s degree, or 11+ years of experience with a PhD
  • Strong background driving RTL design of coherent interconnect and LLC sub-blocks for high-performance digital designs
  • Demonstrated experience spanning architecture definition through RTL implementation
  • Familiarity with on-chip network topologies such as mesh, ring, and crossbar interconnects, along with working knowledge of Arm AMBA5 CHI, AMBA4 ACE, AXI, and related coherent interconnect protocols.
  • Deep expertise in Verilog/SystemVerilog and solid understanding of the complete ASIC design flow including STA, DFT, ECO flows, etc.
  • Strong understanding of memory subsystem architecture, coherent cache design, system caches, coherency mechanisms, and directory-based snoop filter protocols.
  • Proven experience leading technical initiatives, mentoring engineers, and collaborating effectively across dynamic, geographically distributed teams with strong communication and interpersonal skills.
  • Experience with a scripting language like Perl or Python is a plus

Aufgaben

  • Own the development and delivery of custom coherent interconnect IP and/or LLC blocks, ensuring high-quality execution and timely project completion.
  • Collaborate closely with system architects to define and develop next-generation coherent interconnect and LLC architectures.
  • Drive microarchitecture definition and specification, from early architectural exploration and microarchitectural research through detailed specification development and refinement.
  • Partner with verification teams to ensure functional correctness and robust validation of the design.
  • Develop high-quality RTL implementations that meet performance, power, and area (PPA) goals.
  • Work with performance and power teams to optimize architecture and RTL implementations for efficiency and scalability.
  • Collaborate with physical design and CAD teams to resolve implementation, timing, and integration challenges.
  • Provide technical leadership and mentorship to junior engineers across the team.

Kenntnisse

RTL design
Coherent interconnect
LLC blocks
Verilog/SystemVerilog
Architecture definition
Scripting (Python/Perl)
Team leadership

Ausbildung

Bachelor’s degree in Computer Science/Computer Engineering
Master’s degree
PhD

Tools

AMBA5 CHI
AMBA4 ACE
AXI

Jobbeschreibung

Samsung Electronics America, Inc. is seeking a Principal Micro-architect to lead the microarchitecture development of custom coherent interconnect IP and LLC blocks for next-generation designs.

You will drive RTL design, collaborate with system architects, and mentor engineers within a global, highly distributed team to deliver high-performance, power-efficient IP for a broad range of products.

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