Principal Micro-architect, Coherent Interconnect

Samsung Electronics America

San Jose (CA)

On-site

USD 222,000 - 365,000

Full time

14 days+

Get a reply from this employer

Your resume and cover letter, tailored to exactly what they’re hiring for.

Get past ATS filters

Benefits offered by this job

Medical, dental, vision insurance
401(k)
Free onsite lunch
Tuition assistance
Paid time off
Wellness incentives

Job summary

Samsung Electronics America is seeking a Principal Micro-architect to lead microarchitecture development for coherent interconnect IP and LLC blocks used in high-performance devices. You will own RTL design, optimization, and timing closure, collaborating with system architects to refine architectures and drive validation across teams.

You have deep Verilog/SystemVerilog expertise, memory subsystem knowledge, and experience guiding engineers through design flows and verification.

Qualifications

  • Strong background driving RTL design of coherent interconnect and LLC sub-blocks for high-performance digital designs.
  • Demonstrated experience spanning architecture definition through RTL implementation.
  • Familiarity with on-chip network topologies and AMBA protocols (CHI/ACE/AXI).
  • Deep expertise in Verilog/SystemVerilog and full ASIC design flow (STA, DFT, ECO).
  • Strong memory subsystem and cache design knowledge with coherence mechanisms.

Responsibilities

  • Lead microarchitecture development for coherent interconnect IP and LLC blocks.
  • Drive RTL design, performance and power optimization, and timing closure.
  • Collaborate with system architects to define next-generation architectures.
  • Mentor junior engineers and coordinate with verification, physical design, and CAD teams.

Skills

RTL design
Coherent interconnect
LLC design
Verilog/SystemVerilog
AMBA5 CHI
AMBA4 ACE
AXI
Memory subsystem
Leadership
Python

Education

Bachelor's degree in CS/CE
Master's degree
PhD

Job description

Position Summary

Samsung, a world leader in advanced semiconductor technology, is founded on a simple philosophy – the endless pursuit of excellence will create a better world for all. At Samsung Austin Research and Development Center (SARC) and Advanced Computing Lab (ACL), we are building a center of excellence for Intellectual Property (IP) that is applied to high-performance computing devices consumed by millions of people around the world.

Role and Responsibilities

As a Principal Micro-architect, you will lead the microarchitecture development of custom coherent interconnect IP and/or last-level cache (LLC) blocks for next-generation designs. In this role, you will drive key aspects of coherent interconnect RTL design, including performance and power optimization, logic debug, and timing closure. Success in this role requires a strong foundation in computer architecture, microarchitecture, and RTL design. Own the development and delivery of custom coherent interconnect IP and/or LLC blocks, ensuring high-quality execution and timely project completion. Collaborate closely with system architects to define and develop next‑generation coherent interconnect and LLC architectures. Drive microarchitecture definition and specification, from early architectural exploration and microarchitectural research through detailed specification development and refinement. Partner with verification teams to ensure functional correctness and robust validation of the design. Develop high-quality RTL implementations that meet performance, power, and area (PPA) goals. Work with performance and power teams to optimize architecture and RTL implementations for efficiency and scalability. Collaborate with physical design and CAD teams to resolve implementation, timing, and integration challenges. Provide technical leadership and mentorship to junior engineers across the team.

Skills and Qualifications
  • 15+ years of experience with a Bachelor’s degree in Computer Science/Computer Engineering/relevant technical field, or 13+ years of experience with a Master’s degree, or 11+ years of experience with a PhD
  • Strong background driving RTL design of coherent interconnect and LLC sub-blocks for high-performance digital designs
  • Demonstrated experience spanning architecture definition through RTL implementation
  • Familiarity with on-chip network topologies such as mesh, ring, and crossbar interconnects, along with working knowledge of Arm AMBA5 CHI, AMBA4 ACE, AXI, and related coherent interconnect protocols
  • Deep expertise in Verilog/SystemVerilog and solid understanding of the complete ASIC design flow including STA, DFT, ECO flows, etc.
  • Strong understanding of memory subsystem architecture, coherent cache design, system caches, coherency mechanisms, and directory-based snoop filter protocols.
  • Proven experience leading technical initiatives, mentoring engineers, and collaborating effectively across dynamic, geographically distributed teams with strong communication and interpersonal skills.
  • Experience with a scripting language like Perl or Python is a plus
Our Team

Our System IP team develops proprietary coherent interconnect and memory controller deployed in many high-volume products. Our team plays a key role in influencing the product roadmap for a market-leading system IP solutions. We focus on delivering system modeling capability based on optimization and use-case-driven analysis (gaming, computational photography) that enables a world-class memory subsystem. With architecture scalability at the frontier of our design focus, our performance- and power-optimized IP solution gets integrated into complex semiconductor products, aiming to reach multiple market segments. Being part of a new team of talented individuals with vastly diverse backgrounds and skill sets at a well-established global company means you have limitless room to explore, innovate, and expand role responsibilities to build technical expertise. With a big charter ahead, we get to do challenging work and solve unique problems in a highly collaborative and supportive environment. You will always be learning while helping us shape the team’s culture.

Total Rewards

At Samsung – SARC/ACL, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $221,700 and $364,800. Your actual base pay will depend on variables that may include your education skills, qualifications, experience, and work location. This is an exempt position, which is not eligible for overtime pay under the Fair Labor Standards Act (FLSA).

  • medical, dental, vision, life insurance, 401(k), free onsite lunch, employee purchase program, tuition assistance (after 6 months), paid time off, wellness incentives, and many more.

In addition, regular full-time employees (salaried or hourly) are eligible for MBO bonus compensation, based on company, division, and individual performance. Additionally, this role might be eligible to participate in long term incentive plan and relocation.

Trade Secrets

By submitting an application, you agree not to disclose to Samsung or induce or encourage Samsung to use any confidential or proprietary information (including trade secrets) belonging to a current or former employer or other entity.

U.S. Export Control

This role may require access to information subject to U.S. export control laws. Applicants must be authorized to access such information or eligible for government authorization.

Please visit Samsung membership to see Privacy Policy, which defaults according to your location. You can change Country/Language at the bottom of the page.

Samsung Electronics is a global leader in technology, opening new possibilities for people everywhere. Through relentless innovation and discovery, we are transforming the worlds of TVs, smartphones, wearable devices, tablets, digital appliances, and network systems, and the entire semiconductor industry with our memory, system LSI, foundry, and LED solutions. Samsung is also leading in the development of the Internet of Things through, among others, our Smart Home and Digital Health initiatives. Since being established in 1969, Samsung Electronics has grown into one of the world’s leading technology companies, and become recognized as one of the top global brands. Our network now extends across the world, and Samsung takes great pride in the creativity and diversity of its talented people, who drive our growth. To discover more, please visit our official newsroom at https://news.samsung.com/global/.

Get your free, confidential resume review.

or drag and drop your file here.

Similar jobs

Similar jobs worth comparing

Principal Micro-architect, Coherent Interconnect
Principal Micro-architect, Coherent Interconnect

Samsung Electronics • San Jose (CA)

On-site
USD 222,000 - 365,000
Principal Micro-architect, Coherent Interconnect
Principal Micro-architect, Coherent Interconnect

Samsung Semiconductor • San Jose (CA)

On-site
USD 222,000 - 365,000
Medical
Dental
Vision
+9
Principal Micro-architect, Coherent Interconnect
Principal Micro-architect, Coherent Interconnect

Samsung Semiconductor • Austin (TX)

On-site
USD 222,000 - 365,000
Medical
Dental
Vision
+7
Micro-architect/Logic Designer, Coherent Interconnect
Micro-architect/Logic Designer, Coherent Interconnect

Samsung Semiconductor • San Jose (CA)

On-site
USD 151,000 - 251,800
Medical, dental, and vision insurance
401(k) plan
Free onsite lunch
+1
Micro-architect/Logic Designer, Coherent Interconnect
Micro-architect/Logic Designer, Coherent Interconnect

Samsung Semiconductor • Austin (TX)

On-site
USD 151,000 - 251,800
Medical, dental, and vision insurance
401(k) plan
On-site lunch
+3
Design Verification Engineer, Coherent Interconnect
Design Verification Engineer, Coherent Interconnect

Samsung Electronics America • Austin (TX)

On-site
USD 151,000 - 252,000
Senior Staff Engineer, Debug & Validation Engineer
Senior Staff Engineer, Debug & Validation Engineer

Samsung Electronics America • Austin (TX)

On-site
USD 180,000 - 270,000
Senior Engineer, GPU Front-End Integration
Senior Engineer, GPU Front-End Integration

Samsung Electronics America • San Jose (CA)

On-site
USD 139,000 - 208,000
Medical insurance
Dental insurance
Vision insurance
+4
Sr. Staff Physical Design PPA Engineer
Sr. Staff Physical Design PPA Engineer

Samsung Electronics America • Austin (TX)

On-site
USD 180,000 - 270,000
Medical
Dental
Vision
+8
Senior Staff Engineer, GPU RTL Firmware
Senior Staff Engineer, GPU RTL Firmware

Samsung Electronics America • Austin (TX)

On-site
USD 180,000 - 270,000
Medical
Dental
Vision
+8