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NVIDIA is seeking a Senior Memory System Engineer to join the ASIC Memory Subsystem team in Santa Clara, CA. You will work across memory controller, PHY, firmware, and platform architects to design high-performance, low-power memory technology for Tegra SoCs.
You will analyze DDR/LPDDR/HBM tech, validate memory implementations, and collaborate with DRAM suppliers and projects across the stack. The role favors autonomous, innovative engineers.
NVIDIA is seeking a Senior Memory System Engineer to join the ASIC Memory Subsystem team in Santa Clara, CA. You will work across memory controller, PHY, firmware, and platform architects to design high-performance, low-power memory technology for Tegra SoCs.
You will analyze DDR/LPDDR/HBM tech, validate memory implementations, and collaborate with DRAM suppliers and projects across the stack. The role favors autonomous, innovative engineers.