Senior Memory Systems Architect - Drive Performance

NVIDIA; Durham (NC); On-site; USD 152,000 - 288,000; Full time

Benefits offered by this job

Equity

Benefits

Job summary

NVIDIA is seeking experienced engineers to advance memory system architecture for its world‑changing SOCs across AI, autonomous systems, robotics, and gaming. The role emphasizes architectural and micro‑architectural development, performance modeling, and collaboration within a distributed, product‑oriented team.

Ideal candidates hold an advanced degree with 3+ years in memory subsystems, DDR, caches, coherence protocols, and memory controllers.

Qualifications

• M.S. or Ph.D. in CS, CE, or EE or equivalent experience.
• 3+ years experience in SoC or memory system architecture and performance.
• Deep understanding of memory subsystems– caches, DDR, memory controller, on-chip interconnects.
• Strong communication and ability to work in a distributed, product-oriented team.
• Exposure to Digital systems, VLSI design, Computer Architecture; C/C++ programming.
• Experience with C++, Python and/or Perl; Verilog or SV/UVM a plus.

Responsibilities

• Drive development of architecture and micro-architecture for memory systems.
• Model and simulate features to improve performance and efficiency.
• Implement and maintain performance models, analyze benchmarks and workloads.
• Debug performance and functional issues with models, RTL, and silicon.

Skills

SoC architecture

Memory system architecture

Performance modeling

C/C++ programming

Team collaboration

Education

M.S./Ph.D. in CS/CE/EE or equivalent

Tools

Verilog

SV/UVM

Python

C++

Job description

NVIDIA is seeking experienced engineers to advance memory system architecture for its world‑changing SOCs across AI, autonomous systems, robotics, and gaming. The role emphasizes architectural and micro‑architectural development, performance modeling, and collaboration within a distributed, product‑oriented team.

Ideal candidates hold an advanced degree with 3+ years in memory subsystems, DDR, caches, coherence protocols, and memory controllers.