Senior Memory PHY Architect: Power Modeling Lead

Synopsys, Inc.; Sunnyvale (CA); On-site; USD 180,000 - 280,000; Full time

Job summary

Synopsys, Inc. is seeking a senior architect to lead power-driven memory PHY design in Sunnyvale, CA. You will drive architectural decisions, develop power models, and mentor engineers across large cross-functional teams to ensure successful silicon platforms.

You will own outcomes, collaborate with PHY architects to meet product goals, and leverage Power Artist and PTPX for power analysis and optimization.

Qualifications

• 15+ years in memory PHY architecture and power modeling.
• Experience with Power Artist and PTPX.
• Mentor teams and deliver results.
• Strong analytical and communication skills.
• Collaborate with cross-functional teams to meet product goals.
• Ownership of project outcomes.
• Ability to drive architecture that meets product goals.
• Experience with memory IP and silicon platforms.

Responsibilities

• Designing and developing power-efficient memory PHY architectures.
• Driving the creation and optimization of effective power models for memory subsystems.
• Taking responsibility for project outcomes and ensuring high-quality deliverables.
• Utilizing tools such as Power Artist and PTPX for power analysis and optimization.
• Collaborating with engineering, product management, and customers to align requirements.
• Mentoring engineers and sharing best practices.
• Evaluating new technologies or architectural improvements.
• Supporting IP integration and validation efforts.
• Advance Synopsys’ leadership in memory PHY innovation.
• Drive efficient power modeling practices that enhance product performance.
• Shape future technology and product direction.

Skills

Memory PHY architecture

Power modeling

Power Artist

PTPX

Mentoring teams

Cross-functional collaboration

Ownership of outcomes

Analytical skills

Communication skills

Digital/analog design

Education

BSEE/MSEE

Tools

Power Artist

PTPX

Job description

Synopsys, Inc. is seeking a senior architect to lead power-driven memory PHY design in Sunnyvale, CA. You will drive architectural decisions, develop power models, and mentor engineers across large cross-functional teams to ensure successful silicon platforms.

You will own outcomes, collaborate with PHY architects to meet product goals, and leverage Power Artist and PTPX for power analysis and optimization.