Senior Memory PHY Architect — DDR, HBM & SerDes

Synopsys Inc; Boxborough (MA); On-site; USD 150,000 - 200,000; Full time

Benefits offered by this job

Comprehensive health benefits

Wellness programs

Financial benefits

Job summary

Synopsys Inc. is hiring a technical leader in high-speed memory PHY design, focusing on architecture and pathfinding for advanced solutions. The ideal candidate has 15–20+ years of experience and will engage with teams to deliver top-notch memory interface technologies.

Responsibilities include leading architecture activities, driving advanced circuit solutions, and mentoring engineers. A PhD is preferred, along with a strong track record in complex product delivery. Join Synopsys and be part of a team that shapes the future of Memory PHY solutions.

Qualifications

• 15–20+ years of experience in high-speed interface or memory PHY design.
• Proven experience with DDR, LPDDR, HBM, and/or die-to-die/SerDes technologies.
• Strong background in PHY architecture, high-speed I/O design, and advanced circuit design.

Responsibilities

• Lead architecture and pathfinding activities for next-generation Memory PHY solutions.
• Drive development of advanced circuit solutions for high-speed interfaces.
• Translate customer requirements and industry trends into scalable PHY architectures.

Skills

High-speed interface design

Memory PHY design

Signal integrity

Power integrity

Circuit design

Influencing teams

Education

PhD in Electrical Engineering or related field

Job description

Synopsys Inc. is hiring a technical leader in high-speed memory PHY design, focusing on architecture and pathfinding for advanced solutions. The ideal candidate has 15–20+ years of experience and will engage with teams to deliver top-notch memory interface technologies.

Responsibilities include leading architecture activities, driving advanced circuit solutions, and mentoring engineers. A PhD is preferred, along with a strong track record in complex product delivery. Join Synopsys and be part of a team that shapes the future of Memory PHY solutions.