Senior Memory Controller Verification Specialist

NVIDIA Corporation; Santa Clara, Northern (CA, KY); Hybrid; USD 136,000 - 265,000; Full time

Job summary

NVIDIA is seeking a Senior Verification Engineer for the Tegra SoC Memory Subsystem IP verification team in Santa Clara. You will partner with design and architecture teams to craft verification plans, maintain regressions, close coverage, and sign off both functional correctness and performance requirements.

You’ll develop verification infrastructure, review test plans, and drive performance tests for your IP, while ensuring RTL coverage and enabling FPGA and software teams to validate

Qualifications

• BS / MS or equivalent experience.
• 3+ years of ASIC verification of complex designs.
• Experience with SystemVerilog and UVM based methodology for ASIC verification.
• Strong C/C++ programming and debugging skills.

Responsibilities

• Develop verification infrastructure (testbenches, BFMs, checkers, monitors, randoms).
• Drive test plan execution for planned features.
• Define and drive performance test plans for IP.
• Ensure RTL coverage and sign-off.
• Enable FPGA and software teams to test software.
• Plan for post-silicon verification and debugging.

Skills

SystemVerilog

UVM

C/C++

ASIC verification

RTL debugging

FPGA collaboration

Education

BS/MS or equivalent experience

Tools

VCS

Debussy

GDB

Job description

NVIDIA is seeking a Senior Verification Engineer for the Tegra SoC Memory Subsystem IP verification team in Santa Clara. You will partner with design and architecture teams to craft verification plans, maintain regressions, close coverage, and sign off both functional correctness and performance requirements.

You’ll develop verification infrastructure, review test plans, and drive performance tests for your IP, while ensuring RTL coverage and enabling FPGA and software teams to validate