Senior Memory Controller Verification Engineer — Equity

NVIDIA

Seattle (WA)

On-site

USD 168,000 - 310,500

Full time

14 days+

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Benefits offered by this job

Equity

Job summary

NVIDIA in Seattle is seeking a Senior Verification Engineer to join the GPU Memory Subsystem IP verification team. You will partner with design and architecture to validate implementations, craft verification plans, and sign off on functional correctness and performance.

You will develop testbenches, BFMs, monitors, and randoms; drive test plan execution for planned features; ensure RTL coverage; and collaborate with FPGA and software teams to test software.

Qualifications

  • BS / MS or equivalent experience.
  • 6+ years of ASIC verification experience.
  • Exposure to design and verification tools (VCS or equivalent simulation tools, debug tools like Debussy, GDB).
  • Background with SystemVerilog and UVM based methodology for ASIC verification.

Responsibilities

  • Develop verification infrastructure (testbenches, BFMs, checkers, monitors, randoms).
  • Come up with, review and drive test plan execution for planned features.
  • Understand the performance requirements of your IP, come up with, review and drive performance testplan for your IP.
  • Ensure code and functional coverage of all the RTL which you will verify.
  • Work with and enable FPGA and software teams to ensure that software is tested.
  • Plan for and be involved with post-silicon verification and debug.

Skills

C/C++ programming
SystemVerilog
UVM
ASIC verification
GDB

Education

BS / MS or equivalent experience

Tools

VCS
Debussy
GDB

Job description

NVIDIA in Seattle is seeking a Senior Verification Engineer to join the GPU Memory Subsystem IP verification team. You will partner with design and architecture to validate implementations, craft verification plans, and sign off on functional correctness and performance.

You will develop testbenches, BFMs, monitors, and randoms; drive test plan execution for planned features; ensure RTL coverage; and collaborate with FPGA and software teams to test software.

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