Senior ASIC Verification Engineer - Memory Mgmt & GPU SoC

NVIDIA; Hillsboro (OR); On-site; USD 170,000 - 311,000; Full time

Benefits offered by this job

Equity program

Job summary

NVIDIA is seeking a Senior Verification Engineer to verify the Memory Management Unit for GPUs. You will define verification scope, build testbenches, BFMs, checkers, and monitors, and ensure thorough coverage across ASIC designs. Collaboration with architects and software teams is essential for success.

The role emphasizes advanced testbench methodology, constrained random testing, and reusable verification components, with a focus on memory subsystems and performance.

Qualifications

• Bachelor's or Master's degree in Electrical Engineering or Computer Science or Computer Engineering.
• 8+ years of relevant work or research experience.
• Exposure to ASIC design and verification methodology.
• Strong SystemVerilog, C/C++, test planning, coverage closure, and reusable verification components.
• Knowledgeable in constrained random testing with functional coverage and assertions.
• Understanding of object oriented programming concepts.
• Exposure to simulation tools like VCS, IES and debug tools like Debussy, GDB.
• Good debugging and problem solving skills.

Responsibilities

• As a senior member of our verification team, you'll understand the design & implementation with focus on Memory Management unit, define the verification scope, develop the verification infrastructure (Testbenches, BFMs, Checkers, Monitors), implement test/coverage plans, and verify the correctness of the design.
• Collaborate with architects, designers, software engineers across sites to accomplish your goals.
• Plan and work on strategic direction of the methodology for the testbench with advance methodology.

Skills

SystemVerilog

C/C++

Test planning

Coverage closure

Assertion-based verification

UVM

Education

Electrical Engineering or Computer Science degree

Tools

VCS

IES

Debussy

GDB

Job description

NVIDIA is seeking a Senior Verification Engineer to verify the Memory Management Unit for GPUs. You will define verification scope, build testbenches, BFMs, checkers, and monitors, and ensure thorough coverage across ASIC designs. Collaboration with architects and software teams is essential for success.

The role emphasizes advanced testbench methodology, constrained random testing, and reusable verification components, with a focus on memory subsystems and performance.