Senior Memory Controller Verification Engineer – Equity

NVIDIA; Hillsboro (OR); On-site; USD 168,000 - 310,500; Full time

Benefits offered by this job

Equity

Benefits

Job summary

NVIDIA is seeking a Senior Verification Engineer for our GPU Memory Subsystem IP verification team in Hillsboro, Oregon. You will partner with design and architecture to craft verification plans, build and maintain test benches, and sign off on functional correctness and performance.

The role requires SystemVerilog/UVM experience, VCS or equivalent tools, and strong C/C++ debugging. You will collaborate with FPGA and software teams and participate in post-silicon verification.

Qualifications

• BS / MS or equivalent experience in a relevant field.
• 6+ years ASIC verification experience with attention to detail and teamwork.
• Experience with SystemVerilog and UVM based ASIC verification.
• Exposure to design and verification tools such as VCS, Debussy, or equivalent.

Responsibilities

• Develop verification infrastructure (testbenches, BFMs, checkers, monitors, randoms).
• Review and drive test plan execution for planned features.
• Understand performance requirements and drive performance test plans.
• Ensure code and functional coverage of RTL under verification.
• Collaborate with FPGA and software teams to ensure software is tested.
• Plan for and participate in post-silicon verification and debugging.

Skills

SystemVerilog

UVM

C/C++

ASIC verification

Testbench debugging

Education

BS / MS or equivalent experience

Tools

VCS

Debussy

GDB

Job description

NVIDIA is seeking a Senior Verification Engineer for our GPU Memory Subsystem IP verification team in Hillsboro, Oregon. You will partner with design and architecture to craft verification plans, build and maintain test benches, and sign off on functional correctness and performance.

The role requires SystemVerilog/UVM experience, VCS or equivalent tools, and strong C/C++ debugging. You will collaborate with FPGA and software teams and participate in post-silicon verification.