Senior Memory Controller RTL Lead (Hybrid)

Rambus; Hillsboro (OR); Hybrid; USD 146,000 - 271,000; Full time

Benefits offered by this job

Base salary

Bonus

Equity

Matching 401(k)

Employee stock purchase plan

Medical and dental benefits

Time-off program

Gym membership

Job summary

Rambus seeks a Senior Logic Design Engineer to join the Memory Controller team in Hillsboro, OR. In this full-time role, you will define microarchitecture, develop RTL, and lead complex IP features through design, verification, and customer integration.

You will mentor engineers, collaborate with architecture and product teams, and support field customers to drive high-quality silicon IP delivery in a hybrid work environment.

Qualifications

• Bachelor’s degree in Electrical or Computer Engineering or related field required.
• 8+ years in RTL design, IP development, SoC integration or similar semiconductor roles.
• Expert-level proficiency with Verilog/SystemVerilog and digital design concepts.
• Experience delivering production-quality IP or silicon through multiple lifecycles.
• Strong debugging across RTL sim, verification, and customer use cases.
• Experience with memory controllers and high-performance interfaces preferred.
• Ability to lead discussions, mentor engineers and communicate across teams.

Responsibilities

• Define microarchitecture, develop RTL and guide implementation tradeoffs.
• Lead the design, integration, validation, and delivery of Memory Controller IP.
• Drive integration of internal and third‑party IP, including interface definition.
• Lead debug of simulation, integration, and customer-reported issues.
• Collaborate with verification to improve coverage and validate design intent.
• Provide technical guidance and mentoring to engineers and promote best practices.
• Partner with customers and field teams to support integration and product improvements.

Skills

Verilog/SystemVerilog

RTL design

Memory controllers

Debugging

Technical leadership

Customer interaction

Education

Bachelor’s degree in Electrical/Computer Engineering

Master’s degree preferred

Tools

RTL simulation tools

Job description

Rambus seeks a Senior Logic Design Engineer to join the Memory Controller team in Hillsboro, OR. In this full-time role, you will define microarchitecture, develop RTL, and lead complex IP features through design, verification, and customer integration.

You will mentor engineers, collaborate with architecture and product teams, and support field customers to drive high-quality silicon IP delivery in a hybrid work environment.