Principal Logic Design Engineer, Memory Controllers

Rambus; Hillsboro (OR); Hybrid; USD 127,400 - 236,600; Full time

Benefits offered by this job

Competitive compensation package

401(k) matching

Employee stock purchase plan

Comprehensive medical and dental benefits

Gym membership

Job summary

Rambus, located in Hillsboro, Oregon, is seeking a Principal Logic Design Engineer to join our Silicon IP team. In this pivotal role, you will lead the micro-architecture and design of high-performance memory controllers for data centers and AI applications, aiming to innovate in the fast-growing semiconductor industry.

We offer a flexible hybrid work environment and a competitive compensation package ranging from $127,400 to $236,600 for this full-time position.

Responsibilities

• Own micro-architecture definition and RTL design for critical blocks.
• Analyze performance, power, and area (PPA) trade-offs.
• Collaborate closely with verification team to shape test plans.
• Work with physical design team to resolve timing and power challenges.
• Support FAE team on pre-sales customer engagements.
• Support AE team on post-sale customer deliveries.

Skills

System Verilog/Verilog RTL design expertise

Questa/Incisive/VCS simulator experience

Python/Perl/TCL scripting experience

Ability to learn quickly and work independently

Solid communication and project management skills

Education

BS EE with 10+ years of logic design experience

MSEE with 8+ years of logic design experience

Job description

Rambus, located in Hillsboro, Oregon, is seeking a Principal Logic Design Engineer to join our Silicon IP team. In this pivotal role, you will lead the micro-architecture and design of high-performance memory controllers for data centers and AI applications, aiming to innovate in the fast-growing semiconductor industry.

We offer a flexible hybrid work environment and a competitive compensation package ranging from $127,400 to $236,600 for this full-time position.