Senior Manager, Foundation IP - AI Silicon Leader

Amazon Inc.; Austin (TX); On-site; USD 241,000 - 326,000; Full time

Job summary

Annapurna Labs, AWS Silicon, seeks a Sr. Manager of Foundation IP to own IP strategy from foundry DTCO to library definitions and memory macros.

You will lead a hands-on team of 3–6 engineers, collaborating with Architecture, Physical Design, CAD and Product Engineering to deliver PPA wins for Trainium and Inferentia products. You will set strategy, review schematics, layouts and Liberty data, and ensure IP quality across multiple generations in cutting-edge GAA nodes.

Qualifications

• 3+ years of people management experience.
• Experience as the technical interface to foundation IP vendors or foundries — specifying deliverables and driving SOWs, schedules, ECOs and IP quality.

Responsibilities

• Own foundation IP strategy, vendor roadmaps and QA mechanisms.
• Lead evaluation of libraries, memory compilers and cell architectures for PPA and cost.
• Define memory requirements and interfaces for ML accelerator workloads.
• Lead design and integration of latch arrays and custom register files.
• Drive custom cell opportunities and characterization flows.
• Own characterization strategy and signoff views for IP (NLDM, LVF, LEF, Verilog).
• Partner with Foundry DTCO teams on N3/N2 node enablement and reliability modeling.
• Lead a small team and report IP health and PPA metrics to leadership.

Skills

People management

Vendor management

PPA evaluation

Scripting

Team leadership

Cross-functional collaboration

Education

Electrical/Computer Engineering degree

Advanced degree (MS/PhD)

Tools

Cadence Liberate

Cadence Innovus

Synopsys Fusion Compiler

Synopsys PrimeLib/SiliconSmart

Liberty/LVF/LEF

Verilog/ECM models

Spice/PrimeSim

Job description

Annapurna Labs, AWS Silicon, seeks a Sr. Manager of Foundation IP to own IP strategy from foundry DTCO to library definitions and memory macros.

You will lead a hands-on team of 3–6 engineers, collaborating with Architecture, Physical Design, CAD and Product Engineering to deliver PPA wins for Trainium and Inferentia products. You will set strategy, review schematics, layouts and Liberty data, and ensure IP quality across multiple generations in cutting-edge GAA nodes.